xref: /openbmc/u-boot/drivers/misc/Kconfig (revision d81a1de96e2636163783c342b8fda965e696e382)
10b11dbf7SMasahiro Yamada#
20b11dbf7SMasahiro Yamada# Multifunction miscellaneous devices
30b11dbf7SMasahiro Yamada#
40b11dbf7SMasahiro Yamada
50b11dbf7SMasahiro Yamadamenu "Multifunction device drivers"
60b11dbf7SMasahiro Yamada
74395e06eSThomas Chouconfig MISC
84395e06eSThomas Chou	bool "Enable Driver Model for Misc drivers"
94395e06eSThomas Chou	depends on DM
104395e06eSThomas Chou	help
114395e06eSThomas Chou	  Enable driver model for miscellaneous devices. This class is
124395e06eSThomas Chou	  used only for those do not fit other more general classes. A
134395e06eSThomas Chou	  set of generic read, write and ioctl methods may be used to
144395e06eSThomas Chou	  access the device.
154395e06eSThomas Chou
16ca844dd8SThomas Chouconfig ALTERA_SYSID
17ca844dd8SThomas Chou	bool "Altera Sysid support"
18ca844dd8SThomas Chou	depends on MISC
19ca844dd8SThomas Chou	help
20ca844dd8SThomas Chou	  Select this to enable a sysid for Altera devices. Please find
21ca844dd8SThomas Chou	  details on the "Embedded Peripherals IP User Guide" of Altera.
22ca844dd8SThomas Chou
23aa5eb9a3SMarek Behúnconfig ATSHA204A
24aa5eb9a3SMarek Behún	bool "Support for Atmel ATSHA204A module"
25aa5eb9a3SMarek Behún	depends on MISC
26aa5eb9a3SMarek Behún	help
27aa5eb9a3SMarek Behún	   Enable support for I2C connected Atmel's ATSHA204A
28aa5eb9a3SMarek Behún	   CryptoAuthentication module found for example on the Turris Omnia
29aa5eb9a3SMarek Behún	   board.
30aa5eb9a3SMarek Behún
3149cd8e85SPhilipp Tomsichconfig ROCKCHIP_EFUSE
3249cd8e85SPhilipp Tomsich        bool "Rockchip e-fuse support"
3349cd8e85SPhilipp Tomsich	depends on MISC
3449cd8e85SPhilipp Tomsich	help
3549cd8e85SPhilipp Tomsich	  Enable (read-only) access for the e-fuse block found in Rockchip
3649cd8e85SPhilipp Tomsich	  SoCs: accesses can either be made using byte addressing and a length
3749cd8e85SPhilipp Tomsich	  or through child-nodes that are generated based on the e-fuse map
3849cd8e85SPhilipp Tomsich	  retrieved from the DTS.
3949cd8e85SPhilipp Tomsich
4049cd8e85SPhilipp Tomsich	  This driver currently supports the RK3399 only, but can easily be
4149cd8e85SPhilipp Tomsich	  extended (by porting the read function from the Linux kernel sources)
4249cd8e85SPhilipp Tomsich	  to support other recent Rockchip devices.
4349cd8e85SPhilipp Tomsich
446fb9ac15SSimon Glassconfig CMD_CROS_EC
456fb9ac15SSimon Glass	bool "Enable crosec command"
466fb9ac15SSimon Glass	depends on CROS_EC
476fb9ac15SSimon Glass	help
486fb9ac15SSimon Glass	  Enable command-line access to the Chrome OS EC (Embedded
496fb9ac15SSimon Glass	  Controller). This provides the 'crosec' command which has
506fb9ac15SSimon Glass	  a number of sub-commands for performing EC tasks such as
516fb9ac15SSimon Glass	  updating its flash, accessing a small saved context area
526fb9ac15SSimon Glass	  and talking to the I2C bus behind the EC (if there is one).
536fb9ac15SSimon Glass
546fb9ac15SSimon Glassconfig CROS_EC
556fb9ac15SSimon Glass	bool "Enable Chrome OS EC"
566fb9ac15SSimon Glass	help
576fb9ac15SSimon Glass	  Enable access to the Chrome OS EC. This is a separate
586fb9ac15SSimon Glass	  microcontroller typically available on a SPI bus on Chromebooks. It
596fb9ac15SSimon Glass	  provides access to the keyboard, some internal storage and may
606fb9ac15SSimon Glass	  control access to the battery and main PMIC depending on the
616fb9ac15SSimon Glass	  device. You can use the 'crosec' command to access it.
626fb9ac15SSimon Glass
636fb9ac15SSimon Glassconfig CROS_EC_I2C
646fb9ac15SSimon Glass	bool "Enable Chrome OS EC I2C driver"
656fb9ac15SSimon Glass	depends on CROS_EC
666fb9ac15SSimon Glass	help
676fb9ac15SSimon Glass	  Enable I2C access to the Chrome OS EC. This is used on older
686fb9ac15SSimon Glass	  ARM Chromebooks such as snow and spring before the standard bus
696fb9ac15SSimon Glass	  changed to SPI. The EC will accept commands across the I2C using
706fb9ac15SSimon Glass	  a special message protocol, and provide responses.
716fb9ac15SSimon Glass
726fb9ac15SSimon Glassconfig CROS_EC_LPC
736fb9ac15SSimon Glass	bool "Enable Chrome OS EC LPC driver"
746fb9ac15SSimon Glass	depends on CROS_EC
756fb9ac15SSimon Glass	help
766fb9ac15SSimon Glass	  Enable I2C access to the Chrome OS EC. This is used on x86
776fb9ac15SSimon Glass	  Chromebooks such as link and falco. The keyboard is provided
786fb9ac15SSimon Glass	  through a legacy port interface, so on x86 machines the main
796fb9ac15SSimon Glass	  function of the EC is power and thermal management.
806fb9ac15SSimon Glass
8147cb8c65SSimon Glassconfig CROS_EC_SANDBOX
8247cb8c65SSimon Glass	bool "Enable Chrome OS EC sandbox driver"
8347cb8c65SSimon Glass	depends on CROS_EC && SANDBOX
8447cb8c65SSimon Glass	help
8547cb8c65SSimon Glass	  Enable a sandbox emulation of the Chrome OS EC. This supports
8647cb8c65SSimon Glass	  keyboard (use the -l flag to enable the LCD), verified boot context,
8747cb8c65SSimon Glass	  EC flash read/write/erase support and a few other things. It is
8847cb8c65SSimon Glass	  enough to perform a Chrome OS verified boot on sandbox.
8947cb8c65SSimon Glass
906fb9ac15SSimon Glassconfig CROS_EC_SPI
916fb9ac15SSimon Glass	bool "Enable Chrome OS EC SPI driver"
926fb9ac15SSimon Glass	depends on CROS_EC
936fb9ac15SSimon Glass	help
946fb9ac15SSimon Glass	  Enable SPI access to the Chrome OS EC. This is used on newer
956fb9ac15SSimon Glass	  ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
966fb9ac15SSimon Glass	  provides a faster and more robust interface than I2C but the bugs
976fb9ac15SSimon Glass	  are less interesting.
986fb9ac15SSimon Glass
99879704d8SSimon Glassconfig DS4510
100879704d8SSimon Glass	bool "Enable support for DS4510 CPU supervisor"
101879704d8SSimon Glass	help
102879704d8SSimon Glass	  Enable support for the Maxim DS4510 CPU supervisor. It has an
103879704d8SSimon Glass	  integrated 64-byte EEPROM, four programmable non-volatile I/O pins
104879704d8SSimon Glass	  and a configurable timer for the supervisor function. The device is
105879704d8SSimon Glass	  connected over I2C.
106879704d8SSimon Glass
107c12e0d93SPeng Fanconfig FSL_SEC_MON
108fe78378dSgaurav rana	bool "Enable FSL SEC_MON Driver"
109fe78378dSgaurav rana	help
110fe78378dSgaurav rana	  Freescale Security Monitor block is responsible for monitoring
111fe78378dSgaurav rana	  system states.
112fe78378dSgaurav rana	  Security Monitor can be transitioned on any security failures,
113fe78378dSgaurav rana	  like software violations or hardware security violations.
1141cdd9412SStefan Roese
1153e020f03SPeng Fanconfig MXC_OCOTP
1163e020f03SPeng Fan	bool "Enable MXC OCOTP Driver"
1173e020f03SPeng Fan	help
1183e020f03SPeng Fan	  If you say Y here, you will get support for the One Time
1193e020f03SPeng Fan	  Programmable memory pages that are stored on the some
1203e020f03SPeng Fan	  Freescale i.MX processors.
1213e020f03SPeng Fan
1224cf9e464SStefan Roeseconfig NUVOTON_NCT6102D
1234cf9e464SStefan Roese	bool "Enable Nuvoton NCT6102D Super I/O driver"
1244cf9e464SStefan Roese	help
1254cf9e464SStefan Roese	  If you say Y here, you will get support for the Nuvoton
1264cf9e464SStefan Roese	  NCT6102D Super I/O driver. This can be used to enable or
1274cf9e464SStefan Roese	  disable the legacy UART, the watchdog or other devices
1284cf9e464SStefan Roese	  in the Nuvoton Super IO chips on X86 platforms.
1294cf9e464SStefan Roese
1305fd6badbSSimon Glassconfig PWRSEQ
1315fd6badbSSimon Glass	bool "Enable power-sequencing drivers"
1325fd6badbSSimon Glass	depends on DM
1335fd6badbSSimon Glass	help
1345fd6badbSSimon Glass	  Power-sequencing drivers provide support for controlling power for
1355fd6badbSSimon Glass	  devices. They are typically referenced by a phandle from another
1365fd6badbSSimon Glass	  device. When the device is started up, its power sequence can be
1375fd6badbSSimon Glass	  initiated.
1385fd6badbSSimon Glass
1395fd6badbSSimon Glassconfig SPL_PWRSEQ
1405fd6badbSSimon Glass	bool "Enable power-sequencing drivers for SPL"
1415fd6badbSSimon Glass	depends on PWRSEQ
1425fd6badbSSimon Glass	help
1435fd6badbSSimon Glass	  Power-sequencing drivers provide support for controlling power for
1445fd6badbSSimon Glass	  devices. They are typically referenced by a phandle from another
1455fd6badbSSimon Glass	  device. When the device is started up, its power sequence can be
1465fd6badbSSimon Glass	  initiated.
1475fd6badbSSimon Glass
1481cdd9412SStefan Roeseconfig PCA9551_LED
1491cdd9412SStefan Roese	bool "Enable PCA9551 LED driver"
1501cdd9412SStefan Roese	help
1511cdd9412SStefan Roese	  Enable driver for PCA9551 LED controller. This controller
1521cdd9412SStefan Roese	  is connected via I2C. So I2C needs to be enabled.
1531cdd9412SStefan Roese
1541cdd9412SStefan Roeseconfig PCA9551_I2C_ADDR
1551cdd9412SStefan Roese	hex "I2C address of PCA9551 LED controller"
1561cdd9412SStefan Roese	depends on PCA9551_LED
1571cdd9412SStefan Roese	default 0x60
1581cdd9412SStefan Roese	help
1591cdd9412SStefan Roese	  The I2C address of the PCA9551 LED controller.
160f9917454SSimon Glass
161bd3ee84aSStephen Warrenconfig TEGRA_CAR
162bd3ee84aSStephen Warren	bool "Enable support for the Tegra CAR driver"
163bd3ee84aSStephen Warren	depends on TEGRA_NO_BPMP
164bd3ee84aSStephen Warren	help
165bd3ee84aSStephen Warren	  The Tegra CAR (Clock and Reset Controller) is a HW module that
166bd3ee84aSStephen Warren	  controls almost all clocks and resets in a Tegra SoC.
167bd3ee84aSStephen Warren
16873dd5c4cSStephen Warrenconfig TEGRA186_BPMP
16973dd5c4cSStephen Warren	bool "Enable support for the Tegra186 BPMP driver"
17073dd5c4cSStephen Warren	depends on TEGRA186
17173dd5c4cSStephen Warren	help
17273dd5c4cSStephen Warren	  The Tegra BPMP (Boot and Power Management Processor) is a separate
17373dd5c4cSStephen Warren	  auxiliary CPU embedded into Tegra to perform power management work,
17473dd5c4cSStephen Warren	  and controls related features such as clocks, resets, power domains,
17573dd5c4cSStephen Warren	  PMIC I2C bus, etc. This driver provides the core low-level
17673dd5c4cSStephen Warren	  communication path by which feature-specific drivers (such as clock)
17773dd5c4cSStephen Warren	  can make requests to the BPMP. This driver is similar to an MFD
17873dd5c4cSStephen Warren	  driver in the Linux kernel.
17973dd5c4cSStephen Warren
18085056932SStefan Roeseconfig WINBOND_W83627
18185056932SStefan Roese	bool "Enable Winbond Super I/O driver"
18285056932SStefan Roese	help
18385056932SStefan Roese	  If you say Y here, you will get support for the Winbond
18485056932SStefan Roese	  W83627 Super I/O driver. This can be used to enable the
18585056932SStefan Roese	  legacy UART or other devices in the Winbond Super IO chips
18685056932SStefan Roese	  on X86 platforms.
18785056932SStefan Roese
188fcf5c041SMiao Yanconfig QFW
189fcf5c041SMiao Yan	bool
190fcf5c041SMiao Yan	help
191fcf5c041SMiao Yan	  Hidden option to enable QEMU fw_cfg interface. This will be selected by
19218686590SMiao Yan	  either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE.
193fcf5c041SMiao Yan
194d7e28918Smario.six@gdsys.ccconfig I2C_EEPROM
195d7e28918Smario.six@gdsys.cc	bool "Enable driver for generic I2C-attached EEPROMs"
196d7e28918Smario.six@gdsys.cc	depends on MISC
197d7e28918Smario.six@gdsys.cc	help
198d7e28918Smario.six@gdsys.cc	  Enable a generic driver for EEPROMs attached via I2C.
199e3f24d4fSAdam Ford
200*d81a1de9SWenyou Yang
201*d81a1de9SWenyou Yangconfig SPL_I2C_EEPROM
202*d81a1de9SWenyou Yang	bool "Enable driver for generic I2C-attached EEPROMs for SPL"
203*d81a1de9SWenyou Yang	depends on MISC && SPL && SPL_DM
204*d81a1de9SWenyou Yang	help
205*d81a1de9SWenyou Yang	  This option is an SPL-variant of the I2C_EEPROM option.
206*d81a1de9SWenyou Yang	  See the help of I2C_EEPROM for details.
207*d81a1de9SWenyou Yang
208e3f24d4fSAdam Fordif I2C_EEPROM
209e3f24d4fSAdam Ford
210e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR
211e3f24d4fSAdam Ford	hex "Chip address of the EEPROM device"
212e3f24d4fSAdam Ford	default 0
213e3f24d4fSAdam Ford
214e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_BUS
215e3f24d4fSAdam Ford	int "I2C bus of the EEPROM device."
216e3f24d4fSAdam Ford	default 0
217e3f24d4fSAdam Ford
218e3f24d4fSAdam Fordconfig SYS_EEPROM_SIZE
219e3f24d4fSAdam Ford	int "Size in bytes of the EEPROM device"
220e3f24d4fSAdam Ford	default 256
221e3f24d4fSAdam Ford
222e3f24d4fSAdam Fordconfig SYS_EEPROM_PAGE_WRITE_BITS
223e3f24d4fSAdam Ford	int "Number of bits used to address bytes in a single page"
224e3f24d4fSAdam Ford	default 0
225e3f24d4fSAdam Ford	help
226e3f24d4fSAdam Ford	  The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
227e3f24d4fSAdam Ford	  A 64 byte page, for example would require six bits.
228e3f24d4fSAdam Ford
229e3f24d4fSAdam Fordconfig SYS_EEPROM_PAGE_WRITE_DELAY_MS
230e3f24d4fSAdam Ford	int "Number of milliseconds to delay between page writes"
231e3f24d4fSAdam Ford	default 0
232e3f24d4fSAdam Ford
233e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR_LEN
234e3f24d4fSAdam Ford	int "Length in bytes of the EEPROM memory array address"
235e3f24d4fSAdam Ford	default 1
236e3f24d4fSAdam Ford	help
237e3f24d4fSAdam Ford	  Note: This is NOT the chip address length!
238e3f24d4fSAdam Ford
239e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR_OVERFLOW
240e3f24d4fSAdam Ford	hex "EEPROM Address Overflow"
241e3f24d4fSAdam Ford	default 0
242e3f24d4fSAdam Ford	help
243e3f24d4fSAdam Ford	  EEPROM chips that implement "address overflow" are ones
244e3f24d4fSAdam Ford	  like Catalyst 24WC04/08/16 which has 9/10/11 bits of
245e3f24d4fSAdam Ford	  address and the extra bits end up in the "chip address" bit
246e3f24d4fSAdam Ford	  slots. This makes a 24WC08 (1Kbyte) chip look like four 256
247e3f24d4fSAdam Ford	  byte chips.
248e3f24d4fSAdam Ford
249e3f24d4fSAdam Fordendif
250e3f24d4fSAdam Ford
251e3f24d4fSAdam Ford
2520b11dbf7SMasahiro Yamadaendmenu
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