xref: /openbmc/u-boot/drivers/misc/Kconfig (revision bd3ee84ac71237656992ae78d0c7dfa7dcb4ceac)
10b11dbf7SMasahiro Yamada#
20b11dbf7SMasahiro Yamada# Multifunction miscellaneous devices
30b11dbf7SMasahiro Yamada#
40b11dbf7SMasahiro Yamada
50b11dbf7SMasahiro Yamadamenu "Multifunction device drivers"
60b11dbf7SMasahiro Yamada
74395e06eSThomas Chouconfig MISC
84395e06eSThomas Chou	bool "Enable Driver Model for Misc drivers"
94395e06eSThomas Chou	depends on DM
104395e06eSThomas Chou	help
114395e06eSThomas Chou	  Enable driver model for miscellaneous devices. This class is
124395e06eSThomas Chou	  used only for those do not fit other more general classes. A
134395e06eSThomas Chou	  set of generic read, write and ioctl methods may be used to
144395e06eSThomas Chou	  access the device.
154395e06eSThomas Chou
16ca844dd8SThomas Chouconfig ALTERA_SYSID
17ca844dd8SThomas Chou	bool "Altera Sysid support"
18ca844dd8SThomas Chou	depends on MISC
19ca844dd8SThomas Chou	help
20ca844dd8SThomas Chou	  Select this to enable a sysid for Altera devices. Please find
21ca844dd8SThomas Chou	  details on the "Embedded Peripherals IP User Guide" of Altera.
22ca844dd8SThomas Chou
236fb9ac15SSimon Glassconfig CMD_CROS_EC
246fb9ac15SSimon Glass	bool "Enable crosec command"
256fb9ac15SSimon Glass	depends on CROS_EC
266fb9ac15SSimon Glass	help
276fb9ac15SSimon Glass	  Enable command-line access to the Chrome OS EC (Embedded
286fb9ac15SSimon Glass	  Controller). This provides the 'crosec' command which has
296fb9ac15SSimon Glass	  a number of sub-commands for performing EC tasks such as
306fb9ac15SSimon Glass	  updating its flash, accessing a small saved context area
316fb9ac15SSimon Glass	  and talking to the I2C bus behind the EC (if there is one).
326fb9ac15SSimon Glass
336fb9ac15SSimon Glassconfig CROS_EC
346fb9ac15SSimon Glass	bool "Enable Chrome OS EC"
356fb9ac15SSimon Glass	help
366fb9ac15SSimon Glass	  Enable access to the Chrome OS EC. This is a separate
376fb9ac15SSimon Glass	  microcontroller typically available on a SPI bus on Chromebooks. It
386fb9ac15SSimon Glass	  provides access to the keyboard, some internal storage and may
396fb9ac15SSimon Glass	  control access to the battery and main PMIC depending on the
406fb9ac15SSimon Glass	  device. You can use the 'crosec' command to access it.
416fb9ac15SSimon Glass
426fb9ac15SSimon Glassconfig CROS_EC_I2C
436fb9ac15SSimon Glass	bool "Enable Chrome OS EC I2C driver"
446fb9ac15SSimon Glass	depends on CROS_EC
456fb9ac15SSimon Glass	help
466fb9ac15SSimon Glass	  Enable I2C access to the Chrome OS EC. This is used on older
476fb9ac15SSimon Glass	  ARM Chromebooks such as snow and spring before the standard bus
486fb9ac15SSimon Glass	  changed to SPI. The EC will accept commands across the I2C using
496fb9ac15SSimon Glass	  a special message protocol, and provide responses.
506fb9ac15SSimon Glass
516fb9ac15SSimon Glassconfig CROS_EC_LPC
526fb9ac15SSimon Glass	bool "Enable Chrome OS EC LPC driver"
536fb9ac15SSimon Glass	depends on CROS_EC
546fb9ac15SSimon Glass	help
556fb9ac15SSimon Glass	  Enable I2C access to the Chrome OS EC. This is used on x86
566fb9ac15SSimon Glass	  Chromebooks such as link and falco. The keyboard is provided
576fb9ac15SSimon Glass	  through a legacy port interface, so on x86 machines the main
586fb9ac15SSimon Glass	  function of the EC is power and thermal management.
596fb9ac15SSimon Glass
6047cb8c65SSimon Glassconfig CROS_EC_SANDBOX
6147cb8c65SSimon Glass	bool "Enable Chrome OS EC sandbox driver"
6247cb8c65SSimon Glass	depends on CROS_EC && SANDBOX
6347cb8c65SSimon Glass	help
6447cb8c65SSimon Glass	  Enable a sandbox emulation of the Chrome OS EC. This supports
6547cb8c65SSimon Glass	  keyboard (use the -l flag to enable the LCD), verified boot context,
6647cb8c65SSimon Glass	  EC flash read/write/erase support and a few other things. It is
6747cb8c65SSimon Glass	  enough to perform a Chrome OS verified boot on sandbox.
6847cb8c65SSimon Glass
696fb9ac15SSimon Glassconfig CROS_EC_SPI
706fb9ac15SSimon Glass	bool "Enable Chrome OS EC SPI driver"
716fb9ac15SSimon Glass	depends on CROS_EC
726fb9ac15SSimon Glass	help
736fb9ac15SSimon Glass	  Enable SPI access to the Chrome OS EC. This is used on newer
746fb9ac15SSimon Glass	  ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
756fb9ac15SSimon Glass	  provides a faster and more robust interface than I2C but the bugs
766fb9ac15SSimon Glass	  are less interesting.
776fb9ac15SSimon Glass
78c12e0d93SPeng Fanconfig FSL_SEC_MON
79fe78378dSgaurav rana	bool "Enable FSL SEC_MON Driver"
80fe78378dSgaurav rana	help
81fe78378dSgaurav rana	  Freescale Security Monitor block is responsible for monitoring
82fe78378dSgaurav rana	  system states.
83fe78378dSgaurav rana	  Security Monitor can be transitioned on any security failures,
84fe78378dSgaurav rana	  like software violations or hardware security violations.
851cdd9412SStefan Roese
863e020f03SPeng Fanconfig MXC_OCOTP
873e020f03SPeng Fan	bool "Enable MXC OCOTP Driver"
883e020f03SPeng Fan	help
893e020f03SPeng Fan	  If you say Y here, you will get support for the One Time
903e020f03SPeng Fan	  Programmable memory pages that are stored on the some
913e020f03SPeng Fan	  Freescale i.MX processors.
923e020f03SPeng Fan
934cf9e464SStefan Roeseconfig NUVOTON_NCT6102D
944cf9e464SStefan Roese	bool "Enable Nuvoton NCT6102D Super I/O driver"
954cf9e464SStefan Roese	help
964cf9e464SStefan Roese	  If you say Y here, you will get support for the Nuvoton
974cf9e464SStefan Roese	  NCT6102D Super I/O driver. This can be used to enable or
984cf9e464SStefan Roese	  disable the legacy UART, the watchdog or other devices
994cf9e464SStefan Roese	  in the Nuvoton Super IO chips on X86 platforms.
1004cf9e464SStefan Roese
1015fd6badbSSimon Glassconfig PWRSEQ
1025fd6badbSSimon Glass	bool "Enable power-sequencing drivers"
1035fd6badbSSimon Glass	depends on DM
1045fd6badbSSimon Glass	help
1055fd6badbSSimon Glass	  Power-sequencing drivers provide support for controlling power for
1065fd6badbSSimon Glass	  devices. They are typically referenced by a phandle from another
1075fd6badbSSimon Glass	  device. When the device is started up, its power sequence can be
1085fd6badbSSimon Glass	  initiated.
1095fd6badbSSimon Glass
1105fd6badbSSimon Glassconfig SPL_PWRSEQ
1115fd6badbSSimon Glass	bool "Enable power-sequencing drivers for SPL"
1125fd6badbSSimon Glass	depends on PWRSEQ
1135fd6badbSSimon Glass	help
1145fd6badbSSimon Glass	  Power-sequencing drivers provide support for controlling power for
1155fd6badbSSimon Glass	  devices. They are typically referenced by a phandle from another
1165fd6badbSSimon Glass	  device. When the device is started up, its power sequence can be
1175fd6badbSSimon Glass	  initiated.
1185fd6badbSSimon Glass
1191cdd9412SStefan Roeseconfig PCA9551_LED
1201cdd9412SStefan Roese	bool "Enable PCA9551 LED driver"
1211cdd9412SStefan Roese	help
1221cdd9412SStefan Roese	  Enable driver for PCA9551 LED controller. This controller
1231cdd9412SStefan Roese	  is connected via I2C. So I2C needs to be enabled.
1241cdd9412SStefan Roese
1251cdd9412SStefan Roeseconfig PCA9551_I2C_ADDR
1261cdd9412SStefan Roese	hex "I2C address of PCA9551 LED controller"
1271cdd9412SStefan Roese	depends on PCA9551_LED
1281cdd9412SStefan Roese	default 0x60
1291cdd9412SStefan Roese	help
1301cdd9412SStefan Roese	  The I2C address of the PCA9551 LED controller.
131f9917454SSimon Glass
132*bd3ee84aSStephen Warrenconfig TEGRA_CAR
133*bd3ee84aSStephen Warren	bool "Enable support for the Tegra CAR driver"
134*bd3ee84aSStephen Warren	depends on TEGRA_NO_BPMP
135*bd3ee84aSStephen Warren	help
136*bd3ee84aSStephen Warren	  The Tegra CAR (Clock and Reset Controller) is a HW module that
137*bd3ee84aSStephen Warren	  controls almost all clocks and resets in a Tegra SoC.
138*bd3ee84aSStephen Warren
13973dd5c4cSStephen Warrenconfig TEGRA186_BPMP
14073dd5c4cSStephen Warren	bool "Enable support for the Tegra186 BPMP driver"
14173dd5c4cSStephen Warren	depends on TEGRA186
14273dd5c4cSStephen Warren	help
14373dd5c4cSStephen Warren	  The Tegra BPMP (Boot and Power Management Processor) is a separate
14473dd5c4cSStephen Warren	  auxiliary CPU embedded into Tegra to perform power management work,
14573dd5c4cSStephen Warren	  and controls related features such as clocks, resets, power domains,
14673dd5c4cSStephen Warren	  PMIC I2C bus, etc. This driver provides the core low-level
14773dd5c4cSStephen Warren	  communication path by which feature-specific drivers (such as clock)
14873dd5c4cSStephen Warren	  can make requests to the BPMP. This driver is similar to an MFD
14973dd5c4cSStephen Warren	  driver in the Linux kernel.
15073dd5c4cSStephen Warren
15185056932SStefan Roeseconfig WINBOND_W83627
15285056932SStefan Roese	bool "Enable Winbond Super I/O driver"
15385056932SStefan Roese	help
15485056932SStefan Roese	  If you say Y here, you will get support for the Winbond
15585056932SStefan Roese	  W83627 Super I/O driver. This can be used to enable the
15685056932SStefan Roese	  legacy UART or other devices in the Winbond Super IO chips
15785056932SStefan Roese	  on X86 platforms.
15885056932SStefan Roese
159fcf5c041SMiao Yanconfig QFW
160fcf5c041SMiao Yan	bool
161fcf5c041SMiao Yan	help
162fcf5c041SMiao Yan	  Hidden option to enable QEMU fw_cfg interface. This will be selected by
16318686590SMiao Yan	  either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE.
164fcf5c041SMiao Yan
165d7e28918Smario.six@gdsys.ccconfig I2C_EEPROM
166d7e28918Smario.six@gdsys.cc	bool "Enable driver for generic I2C-attached EEPROMs"
167d7e28918Smario.six@gdsys.cc	depends on MISC
168d7e28918Smario.six@gdsys.cc	help
169d7e28918Smario.six@gdsys.cc	  Enable a generic driver for EEPROMs attached via I2C.
1700b11dbf7SMasahiro Yamadaendmenu
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