10b11dbf7SMasahiro Yamada# 20b11dbf7SMasahiro Yamada# Multifunction miscellaneous devices 30b11dbf7SMasahiro Yamada# 40b11dbf7SMasahiro Yamada 50b11dbf7SMasahiro Yamadamenu "Multifunction device drivers" 60b11dbf7SMasahiro Yamada 74395e06eSThomas Chouconfig MISC 84395e06eSThomas Chou bool "Enable Driver Model for Misc drivers" 94395e06eSThomas Chou depends on DM 104395e06eSThomas Chou help 114395e06eSThomas Chou Enable driver model for miscellaneous devices. This class is 124395e06eSThomas Chou used only for those do not fit other more general classes. A 134395e06eSThomas Chou set of generic read, write and ioctl methods may be used to 144395e06eSThomas Chou access the device. 154395e06eSThomas Chou 16979d74d9Sryan_chenconfig ASPEED_AHBC 17979d74d9Sryan_chen bool "Aspeed AHBC support" 18979d74d9Sryan_chen depends on ARCH_ASPEED 19979d74d9Sryan_chen help 20979d74d9Sryan_chen Select this to enable ahbc driver for Aspeed SoC. 21979d74d9Sryan_chen 22979d74d9Sryan_chenconfig ASPEED_H2X 23979d74d9Sryan_chen bool "Aspeed AHB to PCIe bus Bridge support" 24979d74d9Sryan_chen depends on ARCH_ASPEED 25979d74d9Sryan_chen help 26979d74d9Sryan_chen Select this to enable AHB to PCIe bu Bridge driver for Aspeed SoC. 27979d74d9Sryan_chen 28*9450faf4Sryan_chenconfig ASPEED_DP 29*9450faf4Sryan_chen bool "Aspeed Display Port firmware driver" 30*9450faf4Sryan_chen depends on ARCH_ASPEED 31*9450faf4Sryan_chen help 32*9450faf4Sryan_chen Select this to enable Diplay Port firmware driver 33*9450faf4Sryan_chen 34460fdfe6Sryan_chenconfig ASPEED_FSI 35460fdfe6Sryan_chen bool "Enable ASPEED FSI driver" 36460fdfe6Sryan_chen depends on ARCH_ASPEED 37460fdfe6Sryan_chen help 38460fdfe6Sryan_chen Support the FSI master present in the ASPEED system on chips. 39460fdfe6Sryan_chen 40ca844dd8SThomas Chouconfig ALTERA_SYSID 41ca844dd8SThomas Chou bool "Altera Sysid support" 42ca844dd8SThomas Chou depends on MISC 43ca844dd8SThomas Chou help 44ca844dd8SThomas Chou Select this to enable a sysid for Altera devices. Please find 45ca844dd8SThomas Chou details on the "Embedded Peripherals IP User Guide" of Altera. 46ca844dd8SThomas Chou 47aa5eb9a3SMarek Behúnconfig ATSHA204A 48aa5eb9a3SMarek Behún bool "Support for Atmel ATSHA204A module" 49aa5eb9a3SMarek Behún depends on MISC 50aa5eb9a3SMarek Behún help 51aa5eb9a3SMarek Behún Enable support for I2C connected Atmel's ATSHA204A 52aa5eb9a3SMarek Behún CryptoAuthentication module found for example on the Turris Omnia 53aa5eb9a3SMarek Behún board. 54aa5eb9a3SMarek Behún 5549cd8e85SPhilipp Tomsichconfig ROCKCHIP_EFUSE 5649cd8e85SPhilipp Tomsich bool "Rockchip e-fuse support" 5749cd8e85SPhilipp Tomsich depends on MISC 5849cd8e85SPhilipp Tomsich help 5949cd8e85SPhilipp Tomsich Enable (read-only) access for the e-fuse block found in Rockchip 6049cd8e85SPhilipp Tomsich SoCs: accesses can either be made using byte addressing and a length 6149cd8e85SPhilipp Tomsich or through child-nodes that are generated based on the e-fuse map 6249cd8e85SPhilipp Tomsich retrieved from the DTS. 6349cd8e85SPhilipp Tomsich 6449cd8e85SPhilipp Tomsich This driver currently supports the RK3399 only, but can easily be 6549cd8e85SPhilipp Tomsich extended (by porting the read function from the Linux kernel sources) 6649cd8e85SPhilipp Tomsich to support other recent Rockchip devices. 6749cd8e85SPhilipp Tomsich 680fabfeb2SLiviu Dudauconfig VEXPRESS_CONFIG 690fabfeb2SLiviu Dudau bool "Enable support for Arm Versatile Express config bus" 700fabfeb2SLiviu Dudau depends on MISC 710fabfeb2SLiviu Dudau help 720fabfeb2SLiviu Dudau If you say Y here, you will get support for accessing the 730fabfeb2SLiviu Dudau configuration bus on the Arm Versatile Express boards via 740fabfeb2SLiviu Dudau a sysreg driver. 750fabfeb2SLiviu Dudau 766fb9ac15SSimon Glassconfig CMD_CROS_EC 776fb9ac15SSimon Glass bool "Enable crosec command" 786fb9ac15SSimon Glass depends on CROS_EC 796fb9ac15SSimon Glass help 806fb9ac15SSimon Glass Enable command-line access to the Chrome OS EC (Embedded 816fb9ac15SSimon Glass Controller). This provides the 'crosec' command which has 826fb9ac15SSimon Glass a number of sub-commands for performing EC tasks such as 836fb9ac15SSimon Glass updating its flash, accessing a small saved context area 846fb9ac15SSimon Glass and talking to the I2C bus behind the EC (if there is one). 856fb9ac15SSimon Glass 866fb9ac15SSimon Glassconfig CROS_EC 876fb9ac15SSimon Glass bool "Enable Chrome OS EC" 886fb9ac15SSimon Glass help 896fb9ac15SSimon Glass Enable access to the Chrome OS EC. This is a separate 906fb9ac15SSimon Glass microcontroller typically available on a SPI bus on Chromebooks. It 916fb9ac15SSimon Glass provides access to the keyboard, some internal storage and may 926fb9ac15SSimon Glass control access to the battery and main PMIC depending on the 936fb9ac15SSimon Glass device. You can use the 'crosec' command to access it. 946fb9ac15SSimon Glass 956fb9ac15SSimon Glassconfig CROS_EC_I2C 966fb9ac15SSimon Glass bool "Enable Chrome OS EC I2C driver" 976fb9ac15SSimon Glass depends on CROS_EC 986fb9ac15SSimon Glass help 996fb9ac15SSimon Glass Enable I2C access to the Chrome OS EC. This is used on older 1006fb9ac15SSimon Glass ARM Chromebooks such as snow and spring before the standard bus 1016fb9ac15SSimon Glass changed to SPI. The EC will accept commands across the I2C using 1026fb9ac15SSimon Glass a special message protocol, and provide responses. 1036fb9ac15SSimon Glass 1046fb9ac15SSimon Glassconfig CROS_EC_LPC 1056fb9ac15SSimon Glass bool "Enable Chrome OS EC LPC driver" 1066fb9ac15SSimon Glass depends on CROS_EC 1076fb9ac15SSimon Glass help 1086fb9ac15SSimon Glass Enable I2C access to the Chrome OS EC. This is used on x86 1096fb9ac15SSimon Glass Chromebooks such as link and falco. The keyboard is provided 1106fb9ac15SSimon Glass through a legacy port interface, so on x86 machines the main 1116fb9ac15SSimon Glass function of the EC is power and thermal management. 1126fb9ac15SSimon Glass 11347cb8c65SSimon Glassconfig CROS_EC_SANDBOX 11447cb8c65SSimon Glass bool "Enable Chrome OS EC sandbox driver" 11547cb8c65SSimon Glass depends on CROS_EC && SANDBOX 11647cb8c65SSimon Glass help 11747cb8c65SSimon Glass Enable a sandbox emulation of the Chrome OS EC. This supports 11847cb8c65SSimon Glass keyboard (use the -l flag to enable the LCD), verified boot context, 11947cb8c65SSimon Glass EC flash read/write/erase support and a few other things. It is 12047cb8c65SSimon Glass enough to perform a Chrome OS verified boot on sandbox. 12147cb8c65SSimon Glass 1226fb9ac15SSimon Glassconfig CROS_EC_SPI 1236fb9ac15SSimon Glass bool "Enable Chrome OS EC SPI driver" 1246fb9ac15SSimon Glass depends on CROS_EC 1256fb9ac15SSimon Glass help 1266fb9ac15SSimon Glass Enable SPI access to the Chrome OS EC. This is used on newer 1276fb9ac15SSimon Glass ARM Chromebooks such as pit, pi and nyan-big. The SPI interface 1286fb9ac15SSimon Glass provides a faster and more robust interface than I2C but the bugs 1296fb9ac15SSimon Glass are less interesting. 1306fb9ac15SSimon Glass 131879704d8SSimon Glassconfig DS4510 132879704d8SSimon Glass bool "Enable support for DS4510 CPU supervisor" 133879704d8SSimon Glass help 134879704d8SSimon Glass Enable support for the Maxim DS4510 CPU supervisor. It has an 135879704d8SSimon Glass integrated 64-byte EEPROM, four programmable non-volatile I/O pins 136879704d8SSimon Glass and a configurable timer for the supervisor function. The device is 137879704d8SSimon Glass connected over I2C. 138879704d8SSimon Glass 139c12e0d93SPeng Fanconfig FSL_SEC_MON 140fe78378dSgaurav rana bool "Enable FSL SEC_MON Driver" 141fe78378dSgaurav rana help 142fe78378dSgaurav rana Freescale Security Monitor block is responsible for monitoring 143fe78378dSgaurav rana system states. 144fe78378dSgaurav rana Security Monitor can be transitioned on any security failures, 145fe78378dSgaurav rana like software violations or hardware security violations. 1461cdd9412SStefan Roese 147b5392c50SPaul Burtonconfig JZ4780_EFUSE 148b5392c50SPaul Burton bool "Ingenic JZ4780 eFUSE support" 149b5392c50SPaul Burton depends on ARCH_JZ47XX 150b5392c50SPaul Burton help 151b5392c50SPaul Burton This selects support for the eFUSE on Ingenic JZ4780 SoCs. 152b5392c50SPaul Burton 1533e020f03SPeng Fanconfig MXC_OCOTP 1543e020f03SPeng Fan bool "Enable MXC OCOTP Driver" 1553e020f03SPeng Fan help 1563e020f03SPeng Fan If you say Y here, you will get support for the One Time 1573e020f03SPeng Fan Programmable memory pages that are stored on the some 1583e020f03SPeng Fan Freescale i.MX processors. 1593e020f03SPeng Fan 1604cf9e464SStefan Roeseconfig NUVOTON_NCT6102D 1614cf9e464SStefan Roese bool "Enable Nuvoton NCT6102D Super I/O driver" 1624cf9e464SStefan Roese help 1634cf9e464SStefan Roese If you say Y here, you will get support for the Nuvoton 1644cf9e464SStefan Roese NCT6102D Super I/O driver. This can be used to enable or 1654cf9e464SStefan Roese disable the legacy UART, the watchdog or other devices 1664cf9e464SStefan Roese in the Nuvoton Super IO chips on X86 platforms. 1674cf9e464SStefan Roese 1685fd6badbSSimon Glassconfig PWRSEQ 1695fd6badbSSimon Glass bool "Enable power-sequencing drivers" 1705fd6badbSSimon Glass depends on DM 1715fd6badbSSimon Glass help 1725fd6badbSSimon Glass Power-sequencing drivers provide support for controlling power for 1735fd6badbSSimon Glass devices. They are typically referenced by a phandle from another 1745fd6badbSSimon Glass device. When the device is started up, its power sequence can be 1755fd6badbSSimon Glass initiated. 1765fd6badbSSimon Glass 1775fd6badbSSimon Glassconfig SPL_PWRSEQ 1785fd6badbSSimon Glass bool "Enable power-sequencing drivers for SPL" 1795fd6badbSSimon Glass depends on PWRSEQ 1805fd6badbSSimon Glass help 1815fd6badbSSimon Glass Power-sequencing drivers provide support for controlling power for 1825fd6badbSSimon Glass devices. They are typically referenced by a phandle from another 1835fd6badbSSimon Glass device. When the device is started up, its power sequence can be 1845fd6badbSSimon Glass initiated. 1855fd6badbSSimon Glass 1861cdd9412SStefan Roeseconfig PCA9551_LED 1871cdd9412SStefan Roese bool "Enable PCA9551 LED driver" 1881cdd9412SStefan Roese help 1891cdd9412SStefan Roese Enable driver for PCA9551 LED controller. This controller 1901cdd9412SStefan Roese is connected via I2C. So I2C needs to be enabled. 1911cdd9412SStefan Roese 1921cdd9412SStefan Roeseconfig PCA9551_I2C_ADDR 1931cdd9412SStefan Roese hex "I2C address of PCA9551 LED controller" 1941cdd9412SStefan Roese depends on PCA9551_LED 1951cdd9412SStefan Roese default 0x60 1961cdd9412SStefan Roese help 1971cdd9412SStefan Roese The I2C address of the PCA9551 LED controller. 198f9917454SSimon Glass 199c3600e1fSPatrick Delaunayconfig STM32MP_FUSE 200c3600e1fSPatrick Delaunay bool "Enable STM32MP fuse wrapper providing the fuse API" 201c3600e1fSPatrick Delaunay depends on ARCH_STM32MP && MISC 202c3600e1fSPatrick Delaunay default y if CMD_FUSE 203c3600e1fSPatrick Delaunay help 204c3600e1fSPatrick Delaunay If you say Y here, you will get support for the fuse API (OTP) 205c3600e1fSPatrick Delaunay for STM32MP architecture. 206c3600e1fSPatrick Delaunay This API is needed for CMD_FUSE. 207c3600e1fSPatrick Delaunay 2084e280b91SChristophe Kerelloconfig STM32_RCC 2094e280b91SChristophe Kerello bool "Enable RCC driver for the STM32 SoC's family" 210d090cbabSPatrick Delaunay depends on (STM32 || ARCH_STM32MP) && MISC 2114e280b91SChristophe Kerello help 2124e280b91SChristophe Kerello Enable the STM32 RCC driver. The RCC block (Reset and Clock Control 2134e280b91SChristophe Kerello block) is responsible of the management of the clock and reset 2144e280b91SChristophe Kerello generation. 2154e280b91SChristophe Kerello This driver is similar to an MFD driver in the Linux kernel. 2164e280b91SChristophe Kerello 217bd3ee84aSStephen Warrenconfig TEGRA_CAR 218bd3ee84aSStephen Warren bool "Enable support for the Tegra CAR driver" 219bd3ee84aSStephen Warren depends on TEGRA_NO_BPMP 220bd3ee84aSStephen Warren help 221bd3ee84aSStephen Warren The Tegra CAR (Clock and Reset Controller) is a HW module that 222bd3ee84aSStephen Warren controls almost all clocks and resets in a Tegra SoC. 223bd3ee84aSStephen Warren 22473dd5c4cSStephen Warrenconfig TEGRA186_BPMP 22573dd5c4cSStephen Warren bool "Enable support for the Tegra186 BPMP driver" 22673dd5c4cSStephen Warren depends on TEGRA186 22773dd5c4cSStephen Warren help 22873dd5c4cSStephen Warren The Tegra BPMP (Boot and Power Management Processor) is a separate 22973dd5c4cSStephen Warren auxiliary CPU embedded into Tegra to perform power management work, 23073dd5c4cSStephen Warren and controls related features such as clocks, resets, power domains, 23173dd5c4cSStephen Warren PMIC I2C bus, etc. This driver provides the core low-level 23273dd5c4cSStephen Warren communication path by which feature-specific drivers (such as clock) 23373dd5c4cSStephen Warren can make requests to the BPMP. This driver is similar to an MFD 23473dd5c4cSStephen Warren driver in the Linux kernel. 23573dd5c4cSStephen Warren 236cc3fedb2SAdam Fordconfig TWL4030_LED 237cc3fedb2SAdam Ford bool "Enable TWL4030 LED controller" 238cc3fedb2SAdam Ford help 239cc3fedb2SAdam Ford Enable this to add support for the TWL4030 LED controller. 240cc3fedb2SAdam Ford 24185056932SStefan Roeseconfig WINBOND_W83627 24285056932SStefan Roese bool "Enable Winbond Super I/O driver" 24385056932SStefan Roese help 24485056932SStefan Roese If you say Y here, you will get support for the Winbond 24585056932SStefan Roese W83627 Super I/O driver. This can be used to enable the 24685056932SStefan Roese legacy UART or other devices in the Winbond Super IO chips 24785056932SStefan Roese on X86 platforms. 24885056932SStefan Roese 249fcf5c041SMiao Yanconfig QFW 250fcf5c041SMiao Yan bool 251fcf5c041SMiao Yan help 252fcf5c041SMiao Yan Hidden option to enable QEMU fw_cfg interface. This will be selected by 25318686590SMiao Yan either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE. 254fcf5c041SMiao Yan 255d7e28918Smario.six@gdsys.ccconfig I2C_EEPROM 256d7e28918Smario.six@gdsys.cc bool "Enable driver for generic I2C-attached EEPROMs" 257d7e28918Smario.six@gdsys.cc depends on MISC 258d7e28918Smario.six@gdsys.cc help 259d7e28918Smario.six@gdsys.cc Enable a generic driver for EEPROMs attached via I2C. 260e3f24d4fSAdam Ford 261d81a1de9SWenyou Yang 262d81a1de9SWenyou Yangconfig SPL_I2C_EEPROM 263d81a1de9SWenyou Yang bool "Enable driver for generic I2C-attached EEPROMs for SPL" 264d81a1de9SWenyou Yang depends on MISC && SPL && SPL_DM 265d81a1de9SWenyou Yang help 266d81a1de9SWenyou Yang This option is an SPL-variant of the I2C_EEPROM option. 267d81a1de9SWenyou Yang See the help of I2C_EEPROM for details. 268d81a1de9SWenyou Yang 2695c32de20SVipul Kumarconfig ZYNQ_GEM_I2C_MAC_OFFSET 2705c32de20SVipul Kumar hex "Set the I2C MAC offset" 2715c32de20SVipul Kumar default 0x0 272027b1134SMichal Simek depends on DM_I2C 2735c32de20SVipul Kumar help 2745c32de20SVipul Kumar Set the MAC offset for i2C. 2755c32de20SVipul Kumar 276e3f24d4fSAdam Fordif I2C_EEPROM 277e3f24d4fSAdam Ford 278e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR 279e3f24d4fSAdam Ford hex "Chip address of the EEPROM device" 280e3f24d4fSAdam Ford default 0 281e3f24d4fSAdam Ford 282e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_BUS 283e3f24d4fSAdam Ford int "I2C bus of the EEPROM device." 284e3f24d4fSAdam Ford default 0 285e3f24d4fSAdam Ford 286e3f24d4fSAdam Fordconfig SYS_EEPROM_SIZE 287e3f24d4fSAdam Ford int "Size in bytes of the EEPROM device" 288e3f24d4fSAdam Ford default 256 289e3f24d4fSAdam Ford 290e3f24d4fSAdam Fordconfig SYS_EEPROM_PAGE_WRITE_BITS 291e3f24d4fSAdam Ford int "Number of bits used to address bytes in a single page" 292e3f24d4fSAdam Ford default 0 293e3f24d4fSAdam Ford help 294e3f24d4fSAdam Ford The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS. 295e3f24d4fSAdam Ford A 64 byte page, for example would require six bits. 296e3f24d4fSAdam Ford 297e3f24d4fSAdam Fordconfig SYS_EEPROM_PAGE_WRITE_DELAY_MS 298e3f24d4fSAdam Ford int "Number of milliseconds to delay between page writes" 299e3f24d4fSAdam Ford default 0 300e3f24d4fSAdam Ford 301e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR_LEN 302e3f24d4fSAdam Ford int "Length in bytes of the EEPROM memory array address" 303e3f24d4fSAdam Ford default 1 304e3f24d4fSAdam Ford help 305e3f24d4fSAdam Ford Note: This is NOT the chip address length! 306e3f24d4fSAdam Ford 307e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR_OVERFLOW 308e3f24d4fSAdam Ford hex "EEPROM Address Overflow" 309e3f24d4fSAdam Ford default 0 310e3f24d4fSAdam Ford help 311e3f24d4fSAdam Ford EEPROM chips that implement "address overflow" are ones 312e3f24d4fSAdam Ford like Catalyst 24WC04/08/16 which has 9/10/11 bits of 313e3f24d4fSAdam Ford address and the extra bits end up in the "chip address" bit 314e3f24d4fSAdam Ford slots. This makes a 24WC08 (1Kbyte) chip look like four 256 315e3f24d4fSAdam Ford byte chips. 316e3f24d4fSAdam Ford 317e3f24d4fSAdam Fordendif 318e3f24d4fSAdam Ford 31986da8c12SMario Sixconfig GDSYS_RXAUI_CTRL 32086da8c12SMario Six bool "Enable gdsys RXAUI control driver" 32186da8c12SMario Six depends on MISC 32286da8c12SMario Six help 32386da8c12SMario Six Support gdsys FPGA's RXAUI control. 3247e86242bSMario Six 3257e86242bSMario Sixconfig GDSYS_IOEP 3267e86242bSMario Six bool "Enable gdsys IOEP driver" 3277e86242bSMario Six depends on MISC 3287e86242bSMario Six help 3297e86242bSMario Six Support gdsys FPGA's IO endpoint driver. 330d2166319SMario Six 331d2166319SMario Sixconfig MPC83XX_SERDES 332d2166319SMario Six bool "Enable MPC83xx serdes driver" 333d2166319SMario Six depends on MISC 334d2166319SMario Six help 335d2166319SMario Six Support for serdes found on MPC83xx SoCs. 336d2166319SMario Six 33762030004STien Fong Cheeconfig FS_LOADER 33862030004STien Fong Chee bool "Enable loader driver for file system" 33962030004STien Fong Chee help 34062030004STien Fong Chee This is file system generic loader which can be used to load 34162030004STien Fong Chee the file image from the storage into target such as memory. 34262030004STien Fong Chee 34362030004STien Fong Chee The consumer driver would then use this loader to program whatever, 34462030004STien Fong Chee ie. the FPGA device. 34562030004STien Fong Chee 346c0a2b086SMario Sixconfig GDSYS_SOC 347c0a2b086SMario Six bool "Enable gdsys SOC driver" 348c0a2b086SMario Six depends on MISC 349c0a2b086SMario Six help 350c0a2b086SMario Six Support for gdsys IHS SOC, a simple bus associated with each gdsys 351c0a2b086SMario Six IHS (Integrated Hardware Systems) FPGA, which holds all devices whose 352c0a2b086SMario Six register maps are contained within the FPGA's register map. 353c0a2b086SMario Six 354ab88bd2bSMario Sixconfig IHS_FPGA 355ab88bd2bSMario Six bool "Enable IHS FPGA driver" 356ab88bd2bSMario Six depends on MISC 357ab88bd2bSMario Six help 358ab88bd2bSMario Six Support IHS (Integrated Hardware Systems) FPGA, the main FPGAs on 359ab88bd2bSMario Six gdsys devices, which supply the majority of the functionality offered 360ab88bd2bSMario Six by the devices. This driver supports both CON and CPU variants of the 361ab88bd2bSMario Six devices, depending on the device tree entry. 362ab88bd2bSMario Six 3630b11dbf7SMasahiro Yamadaendmenu 364