xref: /openbmc/u-boot/drivers/misc/Kconfig (revision 49cd8e85eb70b5af4a27c7e006fbdd46d5796b2c)
10b11dbf7SMasahiro Yamada#
20b11dbf7SMasahiro Yamada# Multifunction miscellaneous devices
30b11dbf7SMasahiro Yamada#
40b11dbf7SMasahiro Yamada
50b11dbf7SMasahiro Yamadamenu "Multifunction device drivers"
60b11dbf7SMasahiro Yamada
74395e06eSThomas Chouconfig MISC
84395e06eSThomas Chou	bool "Enable Driver Model for Misc drivers"
94395e06eSThomas Chou	depends on DM
104395e06eSThomas Chou	help
114395e06eSThomas Chou	  Enable driver model for miscellaneous devices. This class is
124395e06eSThomas Chou	  used only for those do not fit other more general classes. A
134395e06eSThomas Chou	  set of generic read, write and ioctl methods may be used to
144395e06eSThomas Chou	  access the device.
154395e06eSThomas Chou
16ca844dd8SThomas Chouconfig ALTERA_SYSID
17ca844dd8SThomas Chou	bool "Altera Sysid support"
18ca844dd8SThomas Chou	depends on MISC
19ca844dd8SThomas Chou	help
20ca844dd8SThomas Chou	  Select this to enable a sysid for Altera devices. Please find
21ca844dd8SThomas Chou	  details on the "Embedded Peripherals IP User Guide" of Altera.
22ca844dd8SThomas Chou
23*49cd8e85SPhilipp Tomsichconfig ROCKCHIP_EFUSE
24*49cd8e85SPhilipp Tomsich        bool "Rockchip e-fuse support"
25*49cd8e85SPhilipp Tomsich	depends on MISC
26*49cd8e85SPhilipp Tomsich	help
27*49cd8e85SPhilipp Tomsich	  Enable (read-only) access for the e-fuse block found in Rockchip
28*49cd8e85SPhilipp Tomsich	  SoCs: accesses can either be made using byte addressing and a length
29*49cd8e85SPhilipp Tomsich	  or through child-nodes that are generated based on the e-fuse map
30*49cd8e85SPhilipp Tomsich	  retrieved from the DTS.
31*49cd8e85SPhilipp Tomsich
32*49cd8e85SPhilipp Tomsich	  This driver currently supports the RK3399 only, but can easily be
33*49cd8e85SPhilipp Tomsich	  extended (by porting the read function from the Linux kernel sources)
34*49cd8e85SPhilipp Tomsich	  to support other recent Rockchip devices.
35*49cd8e85SPhilipp Tomsich
366fb9ac15SSimon Glassconfig CMD_CROS_EC
376fb9ac15SSimon Glass	bool "Enable crosec command"
386fb9ac15SSimon Glass	depends on CROS_EC
396fb9ac15SSimon Glass	help
406fb9ac15SSimon Glass	  Enable command-line access to the Chrome OS EC (Embedded
416fb9ac15SSimon Glass	  Controller). This provides the 'crosec' command which has
426fb9ac15SSimon Glass	  a number of sub-commands for performing EC tasks such as
436fb9ac15SSimon Glass	  updating its flash, accessing a small saved context area
446fb9ac15SSimon Glass	  and talking to the I2C bus behind the EC (if there is one).
456fb9ac15SSimon Glass
466fb9ac15SSimon Glassconfig CROS_EC
476fb9ac15SSimon Glass	bool "Enable Chrome OS EC"
486fb9ac15SSimon Glass	help
496fb9ac15SSimon Glass	  Enable access to the Chrome OS EC. This is a separate
506fb9ac15SSimon Glass	  microcontroller typically available on a SPI bus on Chromebooks. It
516fb9ac15SSimon Glass	  provides access to the keyboard, some internal storage and may
526fb9ac15SSimon Glass	  control access to the battery and main PMIC depending on the
536fb9ac15SSimon Glass	  device. You can use the 'crosec' command to access it.
546fb9ac15SSimon Glass
556fb9ac15SSimon Glassconfig CROS_EC_I2C
566fb9ac15SSimon Glass	bool "Enable Chrome OS EC I2C driver"
576fb9ac15SSimon Glass	depends on CROS_EC
586fb9ac15SSimon Glass	help
596fb9ac15SSimon Glass	  Enable I2C access to the Chrome OS EC. This is used on older
606fb9ac15SSimon Glass	  ARM Chromebooks such as snow and spring before the standard bus
616fb9ac15SSimon Glass	  changed to SPI. The EC will accept commands across the I2C using
626fb9ac15SSimon Glass	  a special message protocol, and provide responses.
636fb9ac15SSimon Glass
646fb9ac15SSimon Glassconfig CROS_EC_LPC
656fb9ac15SSimon Glass	bool "Enable Chrome OS EC LPC driver"
666fb9ac15SSimon Glass	depends on CROS_EC
676fb9ac15SSimon Glass	help
686fb9ac15SSimon Glass	  Enable I2C access to the Chrome OS EC. This is used on x86
696fb9ac15SSimon Glass	  Chromebooks such as link and falco. The keyboard is provided
706fb9ac15SSimon Glass	  through a legacy port interface, so on x86 machines the main
716fb9ac15SSimon Glass	  function of the EC is power and thermal management.
726fb9ac15SSimon Glass
7347cb8c65SSimon Glassconfig CROS_EC_SANDBOX
7447cb8c65SSimon Glass	bool "Enable Chrome OS EC sandbox driver"
7547cb8c65SSimon Glass	depends on CROS_EC && SANDBOX
7647cb8c65SSimon Glass	help
7747cb8c65SSimon Glass	  Enable a sandbox emulation of the Chrome OS EC. This supports
7847cb8c65SSimon Glass	  keyboard (use the -l flag to enable the LCD), verified boot context,
7947cb8c65SSimon Glass	  EC flash read/write/erase support and a few other things. It is
8047cb8c65SSimon Glass	  enough to perform a Chrome OS verified boot on sandbox.
8147cb8c65SSimon Glass
826fb9ac15SSimon Glassconfig CROS_EC_SPI
836fb9ac15SSimon Glass	bool "Enable Chrome OS EC SPI driver"
846fb9ac15SSimon Glass	depends on CROS_EC
856fb9ac15SSimon Glass	help
866fb9ac15SSimon Glass	  Enable SPI access to the Chrome OS EC. This is used on newer
876fb9ac15SSimon Glass	  ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
886fb9ac15SSimon Glass	  provides a faster and more robust interface than I2C but the bugs
896fb9ac15SSimon Glass	  are less interesting.
906fb9ac15SSimon Glass
91879704d8SSimon Glassconfig DS4510
92879704d8SSimon Glass	bool "Enable support for DS4510 CPU supervisor"
93879704d8SSimon Glass	help
94879704d8SSimon Glass	  Enable support for the Maxim DS4510 CPU supervisor. It has an
95879704d8SSimon Glass	  integrated 64-byte EEPROM, four programmable non-volatile I/O pins
96879704d8SSimon Glass	  and a configurable timer for the supervisor function. The device is
97879704d8SSimon Glass	  connected over I2C.
98879704d8SSimon Glass
99c12e0d93SPeng Fanconfig FSL_SEC_MON
100fe78378dSgaurav rana	bool "Enable FSL SEC_MON Driver"
101fe78378dSgaurav rana	help
102fe78378dSgaurav rana	  Freescale Security Monitor block is responsible for monitoring
103fe78378dSgaurav rana	  system states.
104fe78378dSgaurav rana	  Security Monitor can be transitioned on any security failures,
105fe78378dSgaurav rana	  like software violations or hardware security violations.
1061cdd9412SStefan Roese
1073e020f03SPeng Fanconfig MXC_OCOTP
1083e020f03SPeng Fan	bool "Enable MXC OCOTP Driver"
1093e020f03SPeng Fan	help
1103e020f03SPeng Fan	  If you say Y here, you will get support for the One Time
1113e020f03SPeng Fan	  Programmable memory pages that are stored on the some
1123e020f03SPeng Fan	  Freescale i.MX processors.
1133e020f03SPeng Fan
1144cf9e464SStefan Roeseconfig NUVOTON_NCT6102D
1154cf9e464SStefan Roese	bool "Enable Nuvoton NCT6102D Super I/O driver"
1164cf9e464SStefan Roese	help
1174cf9e464SStefan Roese	  If you say Y here, you will get support for the Nuvoton
1184cf9e464SStefan Roese	  NCT6102D Super I/O driver. This can be used to enable or
1194cf9e464SStefan Roese	  disable the legacy UART, the watchdog or other devices
1204cf9e464SStefan Roese	  in the Nuvoton Super IO chips on X86 platforms.
1214cf9e464SStefan Roese
1225fd6badbSSimon Glassconfig PWRSEQ
1235fd6badbSSimon Glass	bool "Enable power-sequencing drivers"
1245fd6badbSSimon Glass	depends on DM
1255fd6badbSSimon Glass	help
1265fd6badbSSimon Glass	  Power-sequencing drivers provide support for controlling power for
1275fd6badbSSimon Glass	  devices. They are typically referenced by a phandle from another
1285fd6badbSSimon Glass	  device. When the device is started up, its power sequence can be
1295fd6badbSSimon Glass	  initiated.
1305fd6badbSSimon Glass
1315fd6badbSSimon Glassconfig SPL_PWRSEQ
1325fd6badbSSimon Glass	bool "Enable power-sequencing drivers for SPL"
1335fd6badbSSimon Glass	depends on PWRSEQ
1345fd6badbSSimon Glass	help
1355fd6badbSSimon Glass	  Power-sequencing drivers provide support for controlling power for
1365fd6badbSSimon Glass	  devices. They are typically referenced by a phandle from another
1375fd6badbSSimon Glass	  device. When the device is started up, its power sequence can be
1385fd6badbSSimon Glass	  initiated.
1395fd6badbSSimon Glass
1401cdd9412SStefan Roeseconfig PCA9551_LED
1411cdd9412SStefan Roese	bool "Enable PCA9551 LED driver"
1421cdd9412SStefan Roese	help
1431cdd9412SStefan Roese	  Enable driver for PCA9551 LED controller. This controller
1441cdd9412SStefan Roese	  is connected via I2C. So I2C needs to be enabled.
1451cdd9412SStefan Roese
1461cdd9412SStefan Roeseconfig PCA9551_I2C_ADDR
1471cdd9412SStefan Roese	hex "I2C address of PCA9551 LED controller"
1481cdd9412SStefan Roese	depends on PCA9551_LED
1491cdd9412SStefan Roese	default 0x60
1501cdd9412SStefan Roese	help
1511cdd9412SStefan Roese	  The I2C address of the PCA9551 LED controller.
152f9917454SSimon Glass
153bd3ee84aSStephen Warrenconfig TEGRA_CAR
154bd3ee84aSStephen Warren	bool "Enable support for the Tegra CAR driver"
155bd3ee84aSStephen Warren	depends on TEGRA_NO_BPMP
156bd3ee84aSStephen Warren	help
157bd3ee84aSStephen Warren	  The Tegra CAR (Clock and Reset Controller) is a HW module that
158bd3ee84aSStephen Warren	  controls almost all clocks and resets in a Tegra SoC.
159bd3ee84aSStephen Warren
16073dd5c4cSStephen Warrenconfig TEGRA186_BPMP
16173dd5c4cSStephen Warren	bool "Enable support for the Tegra186 BPMP driver"
16273dd5c4cSStephen Warren	depends on TEGRA186
16373dd5c4cSStephen Warren	help
16473dd5c4cSStephen Warren	  The Tegra BPMP (Boot and Power Management Processor) is a separate
16573dd5c4cSStephen Warren	  auxiliary CPU embedded into Tegra to perform power management work,
16673dd5c4cSStephen Warren	  and controls related features such as clocks, resets, power domains,
16773dd5c4cSStephen Warren	  PMIC I2C bus, etc. This driver provides the core low-level
16873dd5c4cSStephen Warren	  communication path by which feature-specific drivers (such as clock)
16973dd5c4cSStephen Warren	  can make requests to the BPMP. This driver is similar to an MFD
17073dd5c4cSStephen Warren	  driver in the Linux kernel.
17173dd5c4cSStephen Warren
17285056932SStefan Roeseconfig WINBOND_W83627
17385056932SStefan Roese	bool "Enable Winbond Super I/O driver"
17485056932SStefan Roese	help
17585056932SStefan Roese	  If you say Y here, you will get support for the Winbond
17685056932SStefan Roese	  W83627 Super I/O driver. This can be used to enable the
17785056932SStefan Roese	  legacy UART or other devices in the Winbond Super IO chips
17885056932SStefan Roese	  on X86 platforms.
17985056932SStefan Roese
180fcf5c041SMiao Yanconfig QFW
181fcf5c041SMiao Yan	bool
182fcf5c041SMiao Yan	help
183fcf5c041SMiao Yan	  Hidden option to enable QEMU fw_cfg interface. This will be selected by
18418686590SMiao Yan	  either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE.
185fcf5c041SMiao Yan
186d7e28918Smario.six@gdsys.ccconfig I2C_EEPROM
187d7e28918Smario.six@gdsys.cc	bool "Enable driver for generic I2C-attached EEPROMs"
188d7e28918Smario.six@gdsys.cc	depends on MISC
189d7e28918Smario.six@gdsys.cc	help
190d7e28918Smario.six@gdsys.cc	  Enable a generic driver for EEPROMs attached via I2C.
1910b11dbf7SMasahiro Yamadaendmenu
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