xref: /openbmc/u-boot/drivers/i2c/soft_i2c.c (revision 940db16d)
1 /*
2  * (C) Copyright 2009
3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4  * Changes for multibus/multiadapter I2C support.
5  *
6  * (C) Copyright 2001, 2002
7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  *
11  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
12  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
13  * Neil Russell.
14  */
15 
16 #include <common.h>
17 #ifdef	CONFIG_MPC8260			/* only valid for MPC8260 */
18 #include <ioports.h>
19 #include <asm/io.h>
20 #endif
21 #if defined(CONFIG_AVR32)
22 #include <asm/arch/portmux.h>
23 #endif
24 #if defined(CONFIG_AT91FAMILY)
25 #include <asm/io.h>
26 #include <asm/arch/hardware.h>
27 #include <asm/arch/at91_pio.h>
28 #ifdef CONFIG_ATMEL_LEGACY
29 #include <asm/arch/gpio.h>
30 #endif
31 #endif
32 #ifdef	CONFIG_IXP425			/* only valid for IXP425 */
33 #include <asm/arch/ixp425.h>
34 #endif
35 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
36 #include <asm/io.h>
37 #endif
38 #include <i2c.h>
39 
40 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
41 # include <asm/gpio.h>
42 
43 # ifndef I2C_GPIO_SYNC
44 #  define I2C_GPIO_SYNC
45 # endif
46 
47 # ifndef I2C_INIT
48 #  define I2C_INIT \
49 	do { \
50 		gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
51 		gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
52 	} while (0)
53 # endif
54 
55 # ifndef I2C_ACTIVE
56 #  define I2C_ACTIVE do { } while (0)
57 # endif
58 
59 # ifndef I2C_TRISTATE
60 #  define I2C_TRISTATE do { } while (0)
61 # endif
62 
63 # ifndef I2C_READ
64 #  define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
65 # endif
66 
67 # ifndef I2C_SDA
68 #  define I2C_SDA(bit) \
69 	do { \
70 		if (bit) \
71 			gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
72 		else \
73 			gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
74 		I2C_GPIO_SYNC; \
75 	} while (0)
76 # endif
77 
78 # ifndef I2C_SCL
79 #  define I2C_SCL(bit) \
80 	do { \
81 		gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
82 		I2C_GPIO_SYNC; \
83 	} while (0)
84 # endif
85 
86 # ifndef I2C_DELAY
87 #  define I2C_DELAY udelay(5)	/* 1/4 I2C clock duration */
88 # endif
89 
90 #endif
91 
92 /* #define	DEBUG_I2C	*/
93 
94 DECLARE_GLOBAL_DATA_PTR;
95 
96 #ifndef	I2C_SOFT_DECLARATIONS
97 # if defined(CONFIG_MPC8260)
98 #  define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
99 		ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
100 # elif defined(CONFIG_8xx)
101 #  define I2C_SOFT_DECLARATIONS	volatile immap_t *immr = \
102 		(immap_t *)CONFIG_SYS_IMMR;
103 # else
104 #  define I2C_SOFT_DECLARATIONS
105 # endif
106 #endif
107 
108 #if !defined(CONFIG_SYS_I2C_SOFT_SPEED)
109 #define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
110 #endif
111 #if !defined(CONFIG_SYS_I2C_SOFT_SLAVE)
112 #define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
113 #endif
114 
115 /*-----------------------------------------------------------------------
116  * Definitions
117  */
118 #define RETRIES		0
119 
120 #define I2C_ACK		0		/* PD_SDA level to ack a byte */
121 #define I2C_NOACK	1		/* PD_SDA level to noack a byte */
122 
123 
124 #ifdef DEBUG_I2C
125 #define PRINTD(fmt,args...)	do {	\
126 		printf (fmt ,##args);	\
127 	} while (0)
128 #else
129 #define PRINTD(fmt,args...)
130 #endif
131 
132 /*-----------------------------------------------------------------------
133  * Local functions
134  */
135 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
136 static void  send_reset	(void);
137 #endif
138 static void  send_start	(void);
139 static void  send_stop	(void);
140 static void  send_ack	(int);
141 static int   write_byte	(uchar byte);
142 static uchar read_byte	(int);
143 
144 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
145 /*-----------------------------------------------------------------------
146  * Send a reset sequence consisting of 9 clocks with the data signal high
147  * to clock any confused device back into an idle state.  Also send a
148  * <stop> at the end of the sequence for belts & suspenders.
149  */
150 static void send_reset(void)
151 {
152 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
153 	int j;
154 
155 	I2C_SCL(1);
156 	I2C_SDA(1);
157 #ifdef	I2C_INIT
158 	I2C_INIT;
159 #endif
160 	I2C_TRISTATE;
161 	for(j = 0; j < 9; j++) {
162 		I2C_SCL(0);
163 		I2C_DELAY;
164 		I2C_DELAY;
165 		I2C_SCL(1);
166 		I2C_DELAY;
167 		I2C_DELAY;
168 	}
169 	send_stop();
170 	I2C_TRISTATE;
171 }
172 #endif
173 
174 /*-----------------------------------------------------------------------
175  * START: High -> Low on SDA while SCL is High
176  */
177 static void send_start(void)
178 {
179 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
180 
181 	I2C_DELAY;
182 	I2C_SDA(1);
183 	I2C_ACTIVE;
184 	I2C_DELAY;
185 	I2C_SCL(1);
186 	I2C_DELAY;
187 	I2C_SDA(0);
188 	I2C_DELAY;
189 }
190 
191 /*-----------------------------------------------------------------------
192  * STOP: Low -> High on SDA while SCL is High
193  */
194 static void send_stop(void)
195 {
196 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
197 
198 	I2C_SCL(0);
199 	I2C_DELAY;
200 	I2C_SDA(0);
201 	I2C_ACTIVE;
202 	I2C_DELAY;
203 	I2C_SCL(1);
204 	I2C_DELAY;
205 	I2C_SDA(1);
206 	I2C_DELAY;
207 	I2C_TRISTATE;
208 }
209 
210 /*-----------------------------------------------------------------------
211  * ack should be I2C_ACK or I2C_NOACK
212  */
213 static void send_ack(int ack)
214 {
215 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
216 
217 	I2C_SCL(0);
218 	I2C_DELAY;
219 	I2C_ACTIVE;
220 	I2C_SDA(ack);
221 	I2C_DELAY;
222 	I2C_SCL(1);
223 	I2C_DELAY;
224 	I2C_DELAY;
225 	I2C_SCL(0);
226 	I2C_DELAY;
227 }
228 
229 /*-----------------------------------------------------------------------
230  * Send 8 bits and look for an acknowledgement.
231  */
232 static int write_byte(uchar data)
233 {
234 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
235 	int j;
236 	int nack;
237 
238 	I2C_ACTIVE;
239 	for(j = 0; j < 8; j++) {
240 		I2C_SCL(0);
241 		I2C_DELAY;
242 		I2C_SDA(data & 0x80);
243 		I2C_DELAY;
244 		I2C_SCL(1);
245 		I2C_DELAY;
246 		I2C_DELAY;
247 
248 		data <<= 1;
249 	}
250 
251 	/*
252 	 * Look for an <ACK>(negative logic) and return it.
253 	 */
254 	I2C_SCL(0);
255 	I2C_DELAY;
256 	I2C_SDA(1);
257 	I2C_TRISTATE;
258 	I2C_DELAY;
259 	I2C_SCL(1);
260 	I2C_DELAY;
261 	I2C_DELAY;
262 	nack = I2C_READ;
263 	I2C_SCL(0);
264 	I2C_DELAY;
265 	I2C_ACTIVE;
266 
267 	return(nack);	/* not a nack is an ack */
268 }
269 
270 /*-----------------------------------------------------------------------
271  * if ack == I2C_ACK, ACK the byte so can continue reading, else
272  * send I2C_NOACK to end the read.
273  */
274 static uchar read_byte(int ack)
275 {
276 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
277 	int  data;
278 	int  j;
279 
280 	/*
281 	 * Read 8 bits, MSB first.
282 	 */
283 	I2C_TRISTATE;
284 	I2C_SDA(1);
285 	data = 0;
286 	for(j = 0; j < 8; j++) {
287 		I2C_SCL(0);
288 		I2C_DELAY;
289 		I2C_SCL(1);
290 		I2C_DELAY;
291 		data <<= 1;
292 		data |= I2C_READ;
293 		I2C_DELAY;
294 	}
295 	send_ack(ack);
296 
297 	return(data);
298 }
299 
300 /*-----------------------------------------------------------------------
301  * Initialization
302  */
303 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
304 {
305 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
306 	/* call board specific i2c bus reset routine before accessing the   */
307 	/* environment, which might be in a chip on that bus. For details   */
308 	/* about this problem see doc/I2C_Edge_Conditions.                  */
309 	i2c_init_board();
310 #else
311 	/*
312 	 * WARNING: Do NOT save speed in a static variable: if the
313 	 * I2C routines are called before RAM is initialized (to read
314 	 * the DIMM SPD, for instance), RAM won't be usable and your
315 	 * system will crash.
316 	 */
317 	send_reset ();
318 #endif
319 }
320 
321 /*-----------------------------------------------------------------------
322  * Probe to see if a chip is present.  Also good for checking for the
323  * completion of EEPROM writes since the chip stops responding until
324  * the write completes (typically 10mSec).
325  */
326 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
327 {
328 	int rc;
329 
330 	/*
331 	 * perform 1 byte write transaction with just address byte
332 	 * (fake write)
333 	 */
334 	send_start();
335 	rc = write_byte ((addr << 1) | 0);
336 	send_stop();
337 
338 	return (rc ? 1 : 0);
339 }
340 
341 /*-----------------------------------------------------------------------
342  * Read bytes
343  */
344 static int  soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
345 			int alen, uchar *buffer, int len)
346 {
347 	int shift;
348 	PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
349 		chip, addr, alen, buffer, len);
350 
351 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
352 	/*
353 	 * EEPROM chips that implement "address overflow" are ones
354 	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
355 	 * address and the extra bits end up in the "chip address"
356 	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
357 	 * four 256 byte chips.
358 	 *
359 	 * Note that we consider the length of the address field to
360 	 * still be one byte because the extra address bits are
361 	 * hidden in the chip address.
362 	 */
363 	chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
364 
365 	PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
366 		chip, addr);
367 #endif
368 
369 	/*
370 	 * Do the addressing portion of a write cycle to set the
371 	 * chip's address pointer.  If the address length is zero,
372 	 * don't do the normal write cycle to set the address pointer,
373 	 * there is no address pointer in this chip.
374 	 */
375 	send_start();
376 	if(alen > 0) {
377 		if(write_byte(chip << 1)) {	/* write cycle */
378 			send_stop();
379 			PRINTD("i2c_read, no chip responded %02X\n", chip);
380 			return(1);
381 		}
382 		shift = (alen-1) * 8;
383 		while(alen-- > 0) {
384 			if(write_byte(addr >> shift)) {
385 				PRINTD("i2c_read, address not <ACK>ed\n");
386 				return(1);
387 			}
388 			shift -= 8;
389 		}
390 
391 		/* Some I2C chips need a stop/start sequence here,
392 		 * other chips don't work with a full stop and need
393 		 * only a start.  Default behaviour is to send the
394 		 * stop/start sequence.
395 		 */
396 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
397 		send_start();
398 #else
399 		send_stop();
400 		send_start();
401 #endif
402 	}
403 	/*
404 	 * Send the chip address again, this time for a read cycle.
405 	 * Then read the data.  On the last byte, we do a NACK instead
406 	 * of an ACK(len == 0) to terminate the read.
407 	 */
408 	write_byte((chip << 1) | 1);	/* read cycle */
409 	while(len-- > 0) {
410 		*buffer++ = read_byte(len == 0);
411 	}
412 	send_stop();
413 	return(0);
414 }
415 
416 /*-----------------------------------------------------------------------
417  * Write bytes
418  */
419 static int  soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
420 			int alen, uchar *buffer, int len)
421 {
422 	int shift, failures = 0;
423 
424 	PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
425 		chip, addr, alen, buffer, len);
426 
427 	send_start();
428 	if(write_byte(chip << 1)) {	/* write cycle */
429 		send_stop();
430 		PRINTD("i2c_write, no chip responded %02X\n", chip);
431 		return(1);
432 	}
433 	shift = (alen-1) * 8;
434 	while(alen-- > 0) {
435 		if(write_byte(addr >> shift)) {
436 			PRINTD("i2c_write, address not <ACK>ed\n");
437 			return(1);
438 		}
439 		shift -= 8;
440 	}
441 
442 	while(len-- > 0) {
443 		if(write_byte(*buffer++)) {
444 			failures++;
445 		}
446 	}
447 	send_stop();
448 	return(failures);
449 }
450 
451 /*
452  * Register soft i2c adapters
453  */
454 U_BOOT_I2C_ADAP_COMPLETE(soft0, soft_i2c_init, soft_i2c_probe,
455 			 soft_i2c_read, soft_i2c_write, NULL,
456 			 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
457 			 0)
458 #if defined(I2C_SOFT_DECLARATIONS2)
459 U_BOOT_I2C_ADAP_COMPLETE(soft1, soft_i2c_init, soft_i2c_probe,
460 			 soft_i2c_read, soft_i2c_write, NULL,
461 			 CONFIG_SYS_I2C_SOFT_SPEED_2,
462 			 CONFIG_SYS_I2C_SOFT_SLAVE_2,
463 			 1)
464 #endif
465 #if defined(I2C_SOFT_DECLARATIONS3)
466 U_BOOT_I2C_ADAP_COMPLETE(soft2, soft_i2c_init, soft_i2c_probe,
467 			 soft_i2c_read, soft_i2c_write, NULL,
468 			 CONFIG_SYS_I2C_SOFT_SPEED_3,
469 			 CONFIG_SYS_I2C_SOFT_SLAVE_3,
470 			 2)
471 #endif
472 #if defined(I2C_SOFT_DECLARATIONS4)
473 U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe,
474 			 soft_i2c_read, soft_i2c_write, NULL,
475 			 CONFIG_SYS_I2C_SOFT_SPEED_4,
476 			 CONFIG_SYS_I2C_SOFT_SLAVE_4,
477 			 3)
478 #endif
479