1 /* 2 * (C) Copyright 2009 3 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001, 2002 7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * This has been changed substantially by Gerald Van Baren, Custom IDEAS, 12 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by 13 * Neil Russell. 14 */ 15 16 #include <common.h> 17 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ 18 #include <ioports.h> 19 #include <asm/io.h> 20 #endif 21 #if defined(CONFIG_AVR32) 22 #include <asm/arch/portmux.h> 23 #endif 24 #if defined(CONFIG_AT91FAMILY) 25 #include <asm/io.h> 26 #include <asm/arch/hardware.h> 27 #include <asm/arch/at91_pio.h> 28 #ifdef CONFIG_ATMEL_LEGACY 29 #include <asm/arch/gpio.h> 30 #endif 31 #endif 32 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866) 33 #include <asm/io.h> 34 #endif 35 #include <i2c.h> 36 37 #if defined(CONFIG_SOFT_I2C_GPIO_SCL) 38 # include <asm/gpio.h> 39 40 # ifndef I2C_GPIO_SYNC 41 # define I2C_GPIO_SYNC 42 # endif 43 44 # ifndef I2C_INIT 45 # define I2C_INIT \ 46 do { \ 47 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \ 48 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \ 49 } while (0) 50 # endif 51 52 # ifndef I2C_ACTIVE 53 # define I2C_ACTIVE do { } while (0) 54 # endif 55 56 # ifndef I2C_TRISTATE 57 # define I2C_TRISTATE do { } while (0) 58 # endif 59 60 # ifndef I2C_READ 61 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA) 62 # endif 63 64 # ifndef I2C_SDA 65 # define I2C_SDA(bit) \ 66 do { \ 67 if (bit) \ 68 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \ 69 else \ 70 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \ 71 I2C_GPIO_SYNC; \ 72 } while (0) 73 # endif 74 75 # ifndef I2C_SCL 76 # define I2C_SCL(bit) \ 77 do { \ 78 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \ 79 I2C_GPIO_SYNC; \ 80 } while (0) 81 # endif 82 83 # ifndef I2C_DELAY 84 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ 85 # endif 86 87 #endif 88 89 /* #define DEBUG_I2C */ 90 91 DECLARE_GLOBAL_DATA_PTR; 92 93 #ifndef I2C_SOFT_DECLARATIONS 94 # if defined(CONFIG_MPC8260) 95 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \ 96 ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 97 # elif defined(CONFIG_8xx) 98 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = \ 99 (immap_t *)CONFIG_SYS_IMMR; 100 # else 101 # define I2C_SOFT_DECLARATIONS 102 # endif 103 #endif 104 105 #if !defined(CONFIG_SYS_I2C_SOFT_SPEED) 106 #define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED 107 #endif 108 #if !defined(CONFIG_SYS_I2C_SOFT_SLAVE) 109 #define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE 110 #endif 111 112 /*----------------------------------------------------------------------- 113 * Definitions 114 */ 115 #define RETRIES 0 116 117 #define I2C_ACK 0 /* PD_SDA level to ack a byte */ 118 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */ 119 120 121 #ifdef DEBUG_I2C 122 #define PRINTD(fmt,args...) do { \ 123 printf (fmt ,##args); \ 124 } while (0) 125 #else 126 #define PRINTD(fmt,args...) 127 #endif 128 129 /*----------------------------------------------------------------------- 130 * Local functions 131 */ 132 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 133 static void send_reset (void); 134 #endif 135 static void send_start (void); 136 static void send_stop (void); 137 static void send_ack (int); 138 static int write_byte (uchar byte); 139 static uchar read_byte (int); 140 141 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 142 /*----------------------------------------------------------------------- 143 * Send a reset sequence consisting of 9 clocks with the data signal high 144 * to clock any confused device back into an idle state. Also send a 145 * <stop> at the end of the sequence for belts & suspenders. 146 */ 147 static void send_reset(void) 148 { 149 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 150 int j; 151 152 I2C_SCL(1); 153 I2C_SDA(1); 154 #ifdef I2C_INIT 155 I2C_INIT; 156 #endif 157 I2C_TRISTATE; 158 for(j = 0; j < 9; j++) { 159 I2C_SCL(0); 160 I2C_DELAY; 161 I2C_DELAY; 162 I2C_SCL(1); 163 I2C_DELAY; 164 I2C_DELAY; 165 } 166 send_stop(); 167 I2C_TRISTATE; 168 } 169 #endif 170 171 /*----------------------------------------------------------------------- 172 * START: High -> Low on SDA while SCL is High 173 */ 174 static void send_start(void) 175 { 176 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 177 178 I2C_DELAY; 179 I2C_SDA(1); 180 I2C_ACTIVE; 181 I2C_DELAY; 182 I2C_SCL(1); 183 I2C_DELAY; 184 I2C_SDA(0); 185 I2C_DELAY; 186 } 187 188 /*----------------------------------------------------------------------- 189 * STOP: Low -> High on SDA while SCL is High 190 */ 191 static void send_stop(void) 192 { 193 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 194 195 I2C_SCL(0); 196 I2C_DELAY; 197 I2C_SDA(0); 198 I2C_ACTIVE; 199 I2C_DELAY; 200 I2C_SCL(1); 201 I2C_DELAY; 202 I2C_SDA(1); 203 I2C_DELAY; 204 I2C_TRISTATE; 205 } 206 207 /*----------------------------------------------------------------------- 208 * ack should be I2C_ACK or I2C_NOACK 209 */ 210 static void send_ack(int ack) 211 { 212 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 213 214 I2C_SCL(0); 215 I2C_DELAY; 216 I2C_ACTIVE; 217 I2C_SDA(ack); 218 I2C_DELAY; 219 I2C_SCL(1); 220 I2C_DELAY; 221 I2C_DELAY; 222 I2C_SCL(0); 223 I2C_DELAY; 224 } 225 226 /*----------------------------------------------------------------------- 227 * Send 8 bits and look for an acknowledgement. 228 */ 229 static int write_byte(uchar data) 230 { 231 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 232 int j; 233 int nack; 234 235 I2C_ACTIVE; 236 for(j = 0; j < 8; j++) { 237 I2C_SCL(0); 238 I2C_DELAY; 239 I2C_SDA(data & 0x80); 240 I2C_DELAY; 241 I2C_SCL(1); 242 I2C_DELAY; 243 I2C_DELAY; 244 245 data <<= 1; 246 } 247 248 /* 249 * Look for an <ACK>(negative logic) and return it. 250 */ 251 I2C_SCL(0); 252 I2C_DELAY; 253 I2C_SDA(1); 254 I2C_TRISTATE; 255 I2C_DELAY; 256 I2C_SCL(1); 257 I2C_DELAY; 258 I2C_DELAY; 259 nack = I2C_READ; 260 I2C_SCL(0); 261 I2C_DELAY; 262 I2C_ACTIVE; 263 264 return(nack); /* not a nack is an ack */ 265 } 266 267 /*----------------------------------------------------------------------- 268 * if ack == I2C_ACK, ACK the byte so can continue reading, else 269 * send I2C_NOACK to end the read. 270 */ 271 static uchar read_byte(int ack) 272 { 273 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 274 int data; 275 int j; 276 277 /* 278 * Read 8 bits, MSB first. 279 */ 280 I2C_TRISTATE; 281 I2C_SDA(1); 282 data = 0; 283 for(j = 0; j < 8; j++) { 284 I2C_SCL(0); 285 I2C_DELAY; 286 I2C_SCL(1); 287 I2C_DELAY; 288 data <<= 1; 289 data |= I2C_READ; 290 I2C_DELAY; 291 } 292 send_ack(ack); 293 294 return(data); 295 } 296 297 /*----------------------------------------------------------------------- 298 * Initialization 299 */ 300 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) 301 { 302 #if defined(CONFIG_SYS_I2C_INIT_BOARD) 303 /* call board specific i2c bus reset routine before accessing the */ 304 /* environment, which might be in a chip on that bus. For details */ 305 /* about this problem see doc/I2C_Edge_Conditions. */ 306 i2c_init_board(); 307 #else 308 /* 309 * WARNING: Do NOT save speed in a static variable: if the 310 * I2C routines are called before RAM is initialized (to read 311 * the DIMM SPD, for instance), RAM won't be usable and your 312 * system will crash. 313 */ 314 send_reset (); 315 #endif 316 } 317 318 /*----------------------------------------------------------------------- 319 * Probe to see if a chip is present. Also good for checking for the 320 * completion of EEPROM writes since the chip stops responding until 321 * the write completes (typically 10mSec). 322 */ 323 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr) 324 { 325 int rc; 326 327 /* 328 * perform 1 byte write transaction with just address byte 329 * (fake write) 330 */ 331 send_start(); 332 rc = write_byte ((addr << 1) | 0); 333 send_stop(); 334 335 return (rc ? 1 : 0); 336 } 337 338 /*----------------------------------------------------------------------- 339 * Read bytes 340 */ 341 static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, 342 int alen, uchar *buffer, int len) 343 { 344 int shift; 345 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", 346 chip, addr, alen, buffer, len); 347 348 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 349 /* 350 * EEPROM chips that implement "address overflow" are ones 351 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of 352 * address and the extra bits end up in the "chip address" 353 * bit slots. This makes a 24WC08 (1Kbyte) chip look like 354 * four 256 byte chips. 355 * 356 * Note that we consider the length of the address field to 357 * still be one byte because the extra address bits are 358 * hidden in the chip address. 359 */ 360 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); 361 362 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", 363 chip, addr); 364 #endif 365 366 /* 367 * Do the addressing portion of a write cycle to set the 368 * chip's address pointer. If the address length is zero, 369 * don't do the normal write cycle to set the address pointer, 370 * there is no address pointer in this chip. 371 */ 372 send_start(); 373 if(alen > 0) { 374 if(write_byte(chip << 1)) { /* write cycle */ 375 send_stop(); 376 PRINTD("i2c_read, no chip responded %02X\n", chip); 377 return(1); 378 } 379 shift = (alen-1) * 8; 380 while(alen-- > 0) { 381 if(write_byte(addr >> shift)) { 382 PRINTD("i2c_read, address not <ACK>ed\n"); 383 return(1); 384 } 385 shift -= 8; 386 } 387 388 /* Some I2C chips need a stop/start sequence here, 389 * other chips don't work with a full stop and need 390 * only a start. Default behaviour is to send the 391 * stop/start sequence. 392 */ 393 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START 394 send_start(); 395 #else 396 send_stop(); 397 send_start(); 398 #endif 399 } 400 /* 401 * Send the chip address again, this time for a read cycle. 402 * Then read the data. On the last byte, we do a NACK instead 403 * of an ACK(len == 0) to terminate the read. 404 */ 405 write_byte((chip << 1) | 1); /* read cycle */ 406 while(len-- > 0) { 407 *buffer++ = read_byte(len == 0); 408 } 409 send_stop(); 410 return(0); 411 } 412 413 /*----------------------------------------------------------------------- 414 * Write bytes 415 */ 416 static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, 417 int alen, uchar *buffer, int len) 418 { 419 int shift, failures = 0; 420 421 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n", 422 chip, addr, alen, buffer, len); 423 424 send_start(); 425 if(write_byte(chip << 1)) { /* write cycle */ 426 send_stop(); 427 PRINTD("i2c_write, no chip responded %02X\n", chip); 428 return(1); 429 } 430 shift = (alen-1) * 8; 431 while(alen-- > 0) { 432 if(write_byte(addr >> shift)) { 433 PRINTD("i2c_write, address not <ACK>ed\n"); 434 return(1); 435 } 436 shift -= 8; 437 } 438 439 while(len-- > 0) { 440 if(write_byte(*buffer++)) { 441 failures++; 442 } 443 } 444 send_stop(); 445 return(failures); 446 } 447 448 /* 449 * Register soft i2c adapters 450 */ 451 U_BOOT_I2C_ADAP_COMPLETE(soft0, soft_i2c_init, soft_i2c_probe, 452 soft_i2c_read, soft_i2c_write, NULL, 453 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE, 454 0) 455 #if defined(I2C_SOFT_DECLARATIONS2) 456 U_BOOT_I2C_ADAP_COMPLETE(soft1, soft_i2c_init, soft_i2c_probe, 457 soft_i2c_read, soft_i2c_write, NULL, 458 CONFIG_SYS_I2C_SOFT_SPEED_2, 459 CONFIG_SYS_I2C_SOFT_SLAVE_2, 460 1) 461 #endif 462 #if defined(I2C_SOFT_DECLARATIONS3) 463 U_BOOT_I2C_ADAP_COMPLETE(soft2, soft_i2c_init, soft_i2c_probe, 464 soft_i2c_read, soft_i2c_write, NULL, 465 CONFIG_SYS_I2C_SOFT_SPEED_3, 466 CONFIG_SYS_I2C_SOFT_SLAVE_3, 467 2) 468 #endif 469 #if defined(I2C_SOFT_DECLARATIONS4) 470 U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe, 471 soft_i2c_read, soft_i2c_write, NULL, 472 CONFIG_SYS_I2C_SOFT_SPEED_4, 473 CONFIG_SYS_I2C_SOFT_SLAVE_4, 474 3) 475 #endif 476