xref: /openbmc/u-boot/drivers/i2c/soft_i2c.c (revision 6d0f6bcf)
1 /*
2  * (C) Copyright 2001, 2002
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  *
23  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
25  * Neil Russell.
26  */
27 
28 #include <common.h>
29 #ifdef	CONFIG_MPC8260			/* only valid for MPC8260 */
30 #include <ioports.h>
31 #endif
32 #ifdef	CONFIG_AT91RM9200		/* need this for the at91rm9200 */
33 #include <asm/io.h>
34 #include <asm/arch/hardware.h>
35 #endif
36 #ifdef	CONFIG_IXP425			/* only valid for IXP425 */
37 #include <asm/arch/ixp425.h>
38 #endif
39 #ifdef CONFIG_LPC2292
40 #include <asm/arch/hardware.h>
41 #endif
42 #include <i2c.h>
43 
44 /* #define	DEBUG_I2C	*/
45 
46 #ifdef DEBUG_I2C
47 DECLARE_GLOBAL_DATA_PTR;
48 #endif
49 
50 
51 /*-----------------------------------------------------------------------
52  * Definitions
53  */
54 
55 #define RETRIES		0
56 
57 
58 #define I2C_ACK		0		/* PD_SDA level to ack a byte */
59 #define I2C_NOACK	1		/* PD_SDA level to noack a byte */
60 
61 
62 #ifdef DEBUG_I2C
63 #define PRINTD(fmt,args...)	do {	\
64 	if (gd->have_console)		\
65 		printf (fmt ,##args);	\
66 	} while (0)
67 #else
68 #define PRINTD(fmt,args...)
69 #endif
70 
71 #if defined(CONFIG_I2C_MULTI_BUS)
72 static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
73 #endif /* CONFIG_I2C_MULTI_BUS */
74 
75 /*-----------------------------------------------------------------------
76  * Local functions
77  */
78 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
79 static void  send_reset	(void);
80 #endif
81 static void  send_start	(void);
82 static void  send_stop	(void);
83 static void  send_ack	(int);
84 static int   write_byte	(uchar byte);
85 static uchar read_byte	(int);
86 
87 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
88 /*-----------------------------------------------------------------------
89  * Send a reset sequence consisting of 9 clocks with the data signal high
90  * to clock any confused device back into an idle state.  Also send a
91  * <stop> at the end of the sequence for belts & suspenders.
92  */
93 static void send_reset(void)
94 {
95 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
96 	int j;
97 
98 	I2C_SCL(1);
99 	I2C_SDA(1);
100 #ifdef	I2C_INIT
101 	I2C_INIT;
102 #endif
103 	I2C_TRISTATE;
104 	for(j = 0; j < 9; j++) {
105 		I2C_SCL(0);
106 		I2C_DELAY;
107 		I2C_DELAY;
108 		I2C_SCL(1);
109 		I2C_DELAY;
110 		I2C_DELAY;
111 	}
112 	send_stop();
113 	I2C_TRISTATE;
114 }
115 #endif
116 
117 /*-----------------------------------------------------------------------
118  * START: High -> Low on SDA while SCL is High
119  */
120 static void send_start(void)
121 {
122 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
123 
124 	I2C_DELAY;
125 	I2C_SDA(1);
126 	I2C_ACTIVE;
127 	I2C_DELAY;
128 	I2C_SCL(1);
129 	I2C_DELAY;
130 	I2C_SDA(0);
131 	I2C_DELAY;
132 }
133 
134 /*-----------------------------------------------------------------------
135  * STOP: Low -> High on SDA while SCL is High
136  */
137 static void send_stop(void)
138 {
139 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
140 
141 	I2C_SCL(0);
142 	I2C_DELAY;
143 	I2C_SDA(0);
144 	I2C_ACTIVE;
145 	I2C_DELAY;
146 	I2C_SCL(1);
147 	I2C_DELAY;
148 	I2C_SDA(1);
149 	I2C_DELAY;
150 	I2C_TRISTATE;
151 }
152 
153 
154 /*-----------------------------------------------------------------------
155  * ack should be I2C_ACK or I2C_NOACK
156  */
157 static void send_ack(int ack)
158 {
159 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
160 
161 	I2C_SCL(0);
162 	I2C_DELAY;
163 	I2C_ACTIVE;
164 	I2C_SDA(ack);
165 	I2C_DELAY;
166 	I2C_SCL(1);
167 	I2C_DELAY;
168 	I2C_DELAY;
169 	I2C_SCL(0);
170 	I2C_DELAY;
171 }
172 
173 
174 /*-----------------------------------------------------------------------
175  * Send 8 bits and look for an acknowledgement.
176  */
177 static int write_byte(uchar data)
178 {
179 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
180 	int j;
181 	int nack;
182 
183 	I2C_ACTIVE;
184 	for(j = 0; j < 8; j++) {
185 		I2C_SCL(0);
186 		I2C_DELAY;
187 		I2C_SDA(data & 0x80);
188 		I2C_DELAY;
189 		I2C_SCL(1);
190 		I2C_DELAY;
191 		I2C_DELAY;
192 
193 		data <<= 1;
194 	}
195 
196 	/*
197 	 * Look for an <ACK>(negative logic) and return it.
198 	 */
199 	I2C_SCL(0);
200 	I2C_DELAY;
201 	I2C_SDA(1);
202 	I2C_TRISTATE;
203 	I2C_DELAY;
204 	I2C_SCL(1);
205 	I2C_DELAY;
206 	I2C_DELAY;
207 	nack = I2C_READ;
208 	I2C_SCL(0);
209 	I2C_DELAY;
210 	I2C_ACTIVE;
211 
212 	return(nack);	/* not a nack is an ack */
213 }
214 
215 #if defined(CONFIG_I2C_MULTI_BUS)
216 /*
217  * Functions for multiple I2C bus handling
218  */
219 unsigned int i2c_get_bus_num(void)
220 {
221 	return i2c_bus_num;
222 }
223 
224 int i2c_set_bus_num(unsigned int bus)
225 {
226 #if defined(CONFIG_I2C_MUX)
227 	if (bus < CONFIG_SYS_MAX_I2C_BUS) {
228 		i2c_bus_num = bus;
229 	} else {
230 		int	ret;
231 
232 		ret = i2x_mux_select_mux(bus);
233 		if (ret == 0)
234 			i2c_bus_num = bus;
235 		else
236 			return ret;
237 	}
238 #else
239 	if (bus >= CONFIG_SYS_MAX_I2C_BUS)
240 		return -1;
241 	i2c_bus_num = bus;
242 #endif
243 	return 0;
244 }
245 
246 /* TODO: add 100/400k switching */
247 unsigned int i2c_get_bus_speed(void)
248 {
249 	return CONFIG_SYS_I2C_SPEED;
250 }
251 
252 int i2c_set_bus_speed(unsigned int speed)
253 {
254 	if (speed != CONFIG_SYS_I2C_SPEED)
255 		return -1;
256 
257 	return 0;
258 }
259 #endif
260 
261 /*-----------------------------------------------------------------------
262  * if ack == I2C_ACK, ACK the byte so can continue reading, else
263  * send I2C_NOACK to end the read.
264  */
265 static uchar read_byte(int ack)
266 {
267 	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
268 	int  data;
269 	int  j;
270 
271 	/*
272 	 * Read 8 bits, MSB first.
273 	 */
274 	I2C_TRISTATE;
275 	I2C_SDA(1);
276 	data = 0;
277 	for(j = 0; j < 8; j++) {
278 		I2C_SCL(0);
279 		I2C_DELAY;
280 		I2C_SCL(1);
281 		I2C_DELAY;
282 		data <<= 1;
283 		data |= I2C_READ;
284 		I2C_DELAY;
285 	}
286 	send_ack(ack);
287 
288 	return(data);
289 }
290 
291 /*=====================================================================*/
292 /*                         Public Functions                            */
293 /*=====================================================================*/
294 
295 /*-----------------------------------------------------------------------
296  * Initialization
297  */
298 void i2c_init (int speed, int slaveaddr)
299 {
300 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
301 	/* call board specific i2c bus reset routine before accessing the   */
302 	/* environment, which might be in a chip on that bus. For details   */
303 	/* about this problem see doc/I2C_Edge_Conditions.                  */
304 	i2c_init_board();
305 #else
306 	/*
307 	 * WARNING: Do NOT save speed in a static variable: if the
308 	 * I2C routines are called before RAM is initialized (to read
309 	 * the DIMM SPD, for instance), RAM won't be usable and your
310 	 * system will crash.
311 	 */
312 	send_reset ();
313 #endif
314 }
315 
316 /*-----------------------------------------------------------------------
317  * Probe to see if a chip is present.  Also good for checking for the
318  * completion of EEPROM writes since the chip stops responding until
319  * the write completes (typically 10mSec).
320  */
321 int i2c_probe(uchar addr)
322 {
323 	int rc;
324 
325 	/*
326 	 * perform 1 byte write transaction with just address byte
327 	 * (fake write)
328 	 */
329 	send_start();
330 	rc = write_byte ((addr << 1) | 0);
331 	send_stop();
332 
333 	return (rc ? 1 : 0);
334 }
335 
336 /*-----------------------------------------------------------------------
337  * Read bytes
338  */
339 int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
340 {
341 	int shift;
342 	PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
343 		chip, addr, alen, buffer, len);
344 
345 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
346 	/*
347 	 * EEPROM chips that implement "address overflow" are ones
348 	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
349 	 * address and the extra bits end up in the "chip address"
350 	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
351 	 * four 256 byte chips.
352 	 *
353 	 * Note that we consider the length of the address field to
354 	 * still be one byte because the extra address bits are
355 	 * hidden in the chip address.
356 	 */
357 	chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
358 
359 	PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
360 		chip, addr);
361 #endif
362 
363 	/*
364 	 * Do the addressing portion of a write cycle to set the
365 	 * chip's address pointer.  If the address length is zero,
366 	 * don't do the normal write cycle to set the address pointer,
367 	 * there is no address pointer in this chip.
368 	 */
369 	send_start();
370 	if(alen > 0) {
371 		if(write_byte(chip << 1)) {	/* write cycle */
372 			send_stop();
373 			PRINTD("i2c_read, no chip responded %02X\n", chip);
374 			return(1);
375 		}
376 		shift = (alen-1) * 8;
377 		while(alen-- > 0) {
378 			if(write_byte(addr >> shift)) {
379 				PRINTD("i2c_read, address not <ACK>ed\n");
380 				return(1);
381 			}
382 			shift -= 8;
383 		}
384 		send_stop();	/* reportedly some chips need a full stop */
385 		send_start();
386 	}
387 	/*
388 	 * Send the chip address again, this time for a read cycle.
389 	 * Then read the data.  On the last byte, we do a NACK instead
390 	 * of an ACK(len == 0) to terminate the read.
391 	 */
392 	write_byte((chip << 1) | 1);	/* read cycle */
393 	while(len-- > 0) {
394 		*buffer++ = read_byte(len == 0);
395 	}
396 	send_stop();
397 	return(0);
398 }
399 
400 /*-----------------------------------------------------------------------
401  * Write bytes
402  */
403 int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
404 {
405 	int shift, failures = 0;
406 
407 	PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
408 		chip, addr, alen, buffer, len);
409 
410 	send_start();
411 	if(write_byte(chip << 1)) {	/* write cycle */
412 		send_stop();
413 		PRINTD("i2c_write, no chip responded %02X\n", chip);
414 		return(1);
415 	}
416 	shift = (alen-1) * 8;
417 	while(alen-- > 0) {
418 		if(write_byte(addr >> shift)) {
419 			PRINTD("i2c_write, address not <ACK>ed\n");
420 			return(1);
421 		}
422 		shift -= 8;
423 	}
424 
425 	while(len-- > 0) {
426 		if(write_byte(*buffer++)) {
427 			failures++;
428 		}
429 	}
430 	send_stop();
431 	return(failures);
432 }
433 
434 /*-----------------------------------------------------------------------
435  * Read a register
436  */
437 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
438 {
439 	uchar buf;
440 
441 	i2c_read(i2c_addr, reg, 1, &buf, 1);
442 
443 	return(buf);
444 }
445 
446 /*-----------------------------------------------------------------------
447  * Write a register
448  */
449 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
450 {
451 	i2c_write(i2c_addr, reg, 1, &val, 1);
452 }
453