1 /* 2 * (C) Copyright 2001, 2002 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 * 23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS, 24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by 25 * Neil Russell. 26 */ 27 28 #include <common.h> 29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ 30 #include <ioports.h> 31 #include <asm/io.h> 32 #endif 33 #if defined(CONFIG_AT91FAMILY) 34 #include <asm/io.h> 35 #include <asm/arch/hardware.h> 36 #include <asm/arch/at91_pio.h> 37 #ifdef CONFIG_AT91_LEGACY 38 #include <asm/arch/gpio.h> 39 #endif 40 #endif 41 #ifdef CONFIG_IXP425 /* only valid for IXP425 */ 42 #include <asm/arch/ixp425.h> 43 #endif 44 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866) 45 #include <asm/io.h> 46 #endif 47 #include <i2c.h> 48 49 #if defined(CONFIG_SOFT_I2C_GPIO_SCL) 50 # include <asm/gpio.h> 51 52 # ifndef I2C_GPIO_SYNC 53 # define I2C_GPIO_SYNC 54 # endif 55 56 # ifndef I2C_INIT 57 # define I2C_INIT \ 58 do { \ 59 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \ 60 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \ 61 } while (0) 62 # endif 63 64 # ifndef I2C_ACTIVE 65 # define I2C_ACTIVE do { } while (0) 66 # endif 67 68 # ifndef I2C_TRISTATE 69 # define I2C_TRISTATE do { } while (0) 70 # endif 71 72 # ifndef I2C_READ 73 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA) 74 # endif 75 76 # ifndef I2C_SDA 77 # define I2C_SDA(bit) \ 78 do { \ 79 if (bit) \ 80 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \ 81 else \ 82 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \ 83 I2C_GPIO_SYNC; \ 84 } while (0) 85 # endif 86 87 # ifndef I2C_SCL 88 # define I2C_SCL(bit) \ 89 do { \ 90 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \ 91 I2C_GPIO_SYNC; \ 92 } while (0) 93 # endif 94 95 # ifndef I2C_DELAY 96 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ 97 # endif 98 99 #endif 100 101 /* #define DEBUG_I2C */ 102 103 #ifdef DEBUG_I2C 104 DECLARE_GLOBAL_DATA_PTR; 105 #endif 106 107 /*----------------------------------------------------------------------- 108 * Definitions 109 */ 110 111 #define RETRIES 0 112 113 #define I2C_ACK 0 /* PD_SDA level to ack a byte */ 114 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */ 115 116 117 #ifdef DEBUG_I2C 118 #define PRINTD(fmt,args...) do { \ 119 printf (fmt ,##args); \ 120 } while (0) 121 #else 122 #define PRINTD(fmt,args...) 123 #endif 124 125 #if defined(CONFIG_I2C_MULTI_BUS) 126 static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; 127 #endif /* CONFIG_I2C_MULTI_BUS */ 128 129 /*----------------------------------------------------------------------- 130 * Local functions 131 */ 132 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 133 static void send_reset (void); 134 #endif 135 static void send_start (void); 136 static void send_stop (void); 137 static void send_ack (int); 138 static int write_byte (uchar byte); 139 static uchar read_byte (int); 140 141 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 142 /*----------------------------------------------------------------------- 143 * Send a reset sequence consisting of 9 clocks with the data signal high 144 * to clock any confused device back into an idle state. Also send a 145 * <stop> at the end of the sequence for belts & suspenders. 146 */ 147 static void send_reset(void) 148 { 149 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 150 int j; 151 152 I2C_SCL(1); 153 I2C_SDA(1); 154 #ifdef I2C_INIT 155 I2C_INIT; 156 #endif 157 I2C_TRISTATE; 158 for(j = 0; j < 9; j++) { 159 I2C_SCL(0); 160 I2C_DELAY; 161 I2C_DELAY; 162 I2C_SCL(1); 163 I2C_DELAY; 164 I2C_DELAY; 165 } 166 send_stop(); 167 I2C_TRISTATE; 168 } 169 #endif 170 171 /*----------------------------------------------------------------------- 172 * START: High -> Low on SDA while SCL is High 173 */ 174 static void send_start(void) 175 { 176 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 177 178 I2C_DELAY; 179 I2C_SDA(1); 180 I2C_ACTIVE; 181 I2C_DELAY; 182 I2C_SCL(1); 183 I2C_DELAY; 184 I2C_SDA(0); 185 I2C_DELAY; 186 } 187 188 /*----------------------------------------------------------------------- 189 * STOP: Low -> High on SDA while SCL is High 190 */ 191 static void send_stop(void) 192 { 193 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 194 195 I2C_SCL(0); 196 I2C_DELAY; 197 I2C_SDA(0); 198 I2C_ACTIVE; 199 I2C_DELAY; 200 I2C_SCL(1); 201 I2C_DELAY; 202 I2C_SDA(1); 203 I2C_DELAY; 204 I2C_TRISTATE; 205 } 206 207 /*----------------------------------------------------------------------- 208 * ack should be I2C_ACK or I2C_NOACK 209 */ 210 static void send_ack(int ack) 211 { 212 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 213 214 I2C_SCL(0); 215 I2C_DELAY; 216 I2C_ACTIVE; 217 I2C_SDA(ack); 218 I2C_DELAY; 219 I2C_SCL(1); 220 I2C_DELAY; 221 I2C_DELAY; 222 I2C_SCL(0); 223 I2C_DELAY; 224 } 225 226 /*----------------------------------------------------------------------- 227 * Send 8 bits and look for an acknowledgement. 228 */ 229 static int write_byte(uchar data) 230 { 231 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 232 int j; 233 int nack; 234 235 I2C_ACTIVE; 236 for(j = 0; j < 8; j++) { 237 I2C_SCL(0); 238 I2C_DELAY; 239 I2C_SDA(data & 0x80); 240 I2C_DELAY; 241 I2C_SCL(1); 242 I2C_DELAY; 243 I2C_DELAY; 244 245 data <<= 1; 246 } 247 248 /* 249 * Look for an <ACK>(negative logic) and return it. 250 */ 251 I2C_SCL(0); 252 I2C_DELAY; 253 I2C_SDA(1); 254 I2C_TRISTATE; 255 I2C_DELAY; 256 I2C_SCL(1); 257 I2C_DELAY; 258 I2C_DELAY; 259 nack = I2C_READ; 260 I2C_SCL(0); 261 I2C_DELAY; 262 I2C_ACTIVE; 263 264 return(nack); /* not a nack is an ack */ 265 } 266 267 #if defined(CONFIG_I2C_MULTI_BUS) 268 /* 269 * Functions for multiple I2C bus handling 270 */ 271 unsigned int i2c_get_bus_num(void) 272 { 273 return i2c_bus_num; 274 } 275 276 int i2c_set_bus_num(unsigned int bus) 277 { 278 #if defined(CONFIG_I2C_MUX) 279 if (bus < CONFIG_SYS_MAX_I2C_BUS) { 280 i2c_bus_num = bus; 281 } else { 282 int ret; 283 284 ret = i2x_mux_select_mux(bus); 285 i2c_init_board(); 286 if (ret == 0) 287 i2c_bus_num = bus; 288 else 289 return ret; 290 } 291 #else 292 if (bus >= CONFIG_SYS_MAX_I2C_BUS) 293 return -1; 294 i2c_bus_num = bus; 295 #endif 296 return 0; 297 } 298 #endif 299 300 /*----------------------------------------------------------------------- 301 * if ack == I2C_ACK, ACK the byte so can continue reading, else 302 * send I2C_NOACK to end the read. 303 */ 304 static uchar read_byte(int ack) 305 { 306 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 307 int data; 308 int j; 309 310 /* 311 * Read 8 bits, MSB first. 312 */ 313 I2C_TRISTATE; 314 I2C_SDA(1); 315 data = 0; 316 for(j = 0; j < 8; j++) { 317 I2C_SCL(0); 318 I2C_DELAY; 319 I2C_SCL(1); 320 I2C_DELAY; 321 data <<= 1; 322 data |= I2C_READ; 323 I2C_DELAY; 324 } 325 send_ack(ack); 326 327 return(data); 328 } 329 330 /*=====================================================================*/ 331 /* Public Functions */ 332 /*=====================================================================*/ 333 334 /*----------------------------------------------------------------------- 335 * Initialization 336 */ 337 void i2c_init (int speed, int slaveaddr) 338 { 339 #if defined(CONFIG_SYS_I2C_INIT_BOARD) 340 /* call board specific i2c bus reset routine before accessing the */ 341 /* environment, which might be in a chip on that bus. For details */ 342 /* about this problem see doc/I2C_Edge_Conditions. */ 343 i2c_init_board(); 344 #else 345 /* 346 * WARNING: Do NOT save speed in a static variable: if the 347 * I2C routines are called before RAM is initialized (to read 348 * the DIMM SPD, for instance), RAM won't be usable and your 349 * system will crash. 350 */ 351 send_reset (); 352 #endif 353 } 354 355 /*----------------------------------------------------------------------- 356 * Probe to see if a chip is present. Also good for checking for the 357 * completion of EEPROM writes since the chip stops responding until 358 * the write completes (typically 10mSec). 359 */ 360 int i2c_probe(uchar addr) 361 { 362 int rc; 363 364 /* 365 * perform 1 byte write transaction with just address byte 366 * (fake write) 367 */ 368 send_start(); 369 rc = write_byte ((addr << 1) | 0); 370 send_stop(); 371 372 return (rc ? 1 : 0); 373 } 374 375 /*----------------------------------------------------------------------- 376 * Read bytes 377 */ 378 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 379 { 380 int shift; 381 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", 382 chip, addr, alen, buffer, len); 383 384 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 385 /* 386 * EEPROM chips that implement "address overflow" are ones 387 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of 388 * address and the extra bits end up in the "chip address" 389 * bit slots. This makes a 24WC08 (1Kbyte) chip look like 390 * four 256 byte chips. 391 * 392 * Note that we consider the length of the address field to 393 * still be one byte because the extra address bits are 394 * hidden in the chip address. 395 */ 396 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); 397 398 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", 399 chip, addr); 400 #endif 401 402 /* 403 * Do the addressing portion of a write cycle to set the 404 * chip's address pointer. If the address length is zero, 405 * don't do the normal write cycle to set the address pointer, 406 * there is no address pointer in this chip. 407 */ 408 send_start(); 409 if(alen > 0) { 410 if(write_byte(chip << 1)) { /* write cycle */ 411 send_stop(); 412 PRINTD("i2c_read, no chip responded %02X\n", chip); 413 return(1); 414 } 415 shift = (alen-1) * 8; 416 while(alen-- > 0) { 417 if(write_byte(addr >> shift)) { 418 PRINTD("i2c_read, address not <ACK>ed\n"); 419 return(1); 420 } 421 shift -= 8; 422 } 423 424 /* Some I2C chips need a stop/start sequence here, 425 * other chips don't work with a full stop and need 426 * only a start. Default behaviour is to send the 427 * stop/start sequence. 428 */ 429 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START 430 send_start(); 431 #else 432 send_stop(); 433 send_start(); 434 #endif 435 } 436 /* 437 * Send the chip address again, this time for a read cycle. 438 * Then read the data. On the last byte, we do a NACK instead 439 * of an ACK(len == 0) to terminate the read. 440 */ 441 write_byte((chip << 1) | 1); /* read cycle */ 442 while(len-- > 0) { 443 *buffer++ = read_byte(len == 0); 444 } 445 send_stop(); 446 return(0); 447 } 448 449 /*----------------------------------------------------------------------- 450 * Write bytes 451 */ 452 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 453 { 454 int shift, failures = 0; 455 456 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n", 457 chip, addr, alen, buffer, len); 458 459 send_start(); 460 if(write_byte(chip << 1)) { /* write cycle */ 461 send_stop(); 462 PRINTD("i2c_write, no chip responded %02X\n", chip); 463 return(1); 464 } 465 shift = (alen-1) * 8; 466 while(alen-- > 0) { 467 if(write_byte(addr >> shift)) { 468 PRINTD("i2c_write, address not <ACK>ed\n"); 469 return(1); 470 } 471 shift -= 8; 472 } 473 474 while(len-- > 0) { 475 if(write_byte(*buffer++)) { 476 failures++; 477 } 478 } 479 send_stop(); 480 return(failures); 481 } 482