1 /* 2 * (C) Copyright 2001, 2002 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 * 23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS, 24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by 25 * Neil Russell. 26 */ 27 28 #include <common.h> 29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ 30 #include <ioports.h> 31 #include <asm/io.h> 32 #endif 33 #if defined(CONFIG_AT91RM9200) || \ 34 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 35 defined(CONFIG_AT91SAM9263) 36 #include <asm/io.h> 37 #include <asm/arch/hardware.h> 38 #include <asm/arch/at91_pio.h> 39 #ifdef CONFIG_AT91_LEGACY 40 #include <asm/arch/gpio.h> 41 #endif 42 #endif 43 #ifdef CONFIG_IXP425 /* only valid for IXP425 */ 44 #include <asm/arch/ixp425.h> 45 #endif 46 #ifdef CONFIG_LPC2292 47 #include <asm/arch/hardware.h> 48 #endif 49 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866) 50 #include <asm/io.h> 51 #endif 52 #include <i2c.h> 53 54 /* #define DEBUG_I2C */ 55 56 #ifdef DEBUG_I2C 57 DECLARE_GLOBAL_DATA_PTR; 58 #endif 59 60 /*----------------------------------------------------------------------- 61 * Definitions 62 */ 63 64 #define RETRIES 0 65 66 #define I2C_ACK 0 /* PD_SDA level to ack a byte */ 67 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */ 68 69 70 #ifdef DEBUG_I2C 71 #define PRINTD(fmt,args...) do { \ 72 if (gd->have_console) \ 73 printf (fmt ,##args); \ 74 } while (0) 75 #else 76 #define PRINTD(fmt,args...) 77 #endif 78 79 #if defined(CONFIG_I2C_MULTI_BUS) 80 static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; 81 #endif /* CONFIG_I2C_MULTI_BUS */ 82 83 /*----------------------------------------------------------------------- 84 * Local functions 85 */ 86 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 87 static void send_reset (void); 88 #endif 89 static void send_start (void); 90 static void send_stop (void); 91 static void send_ack (int); 92 static int write_byte (uchar byte); 93 static uchar read_byte (int); 94 95 #if !defined(CONFIG_SYS_I2C_INIT_BOARD) 96 /*----------------------------------------------------------------------- 97 * Send a reset sequence consisting of 9 clocks with the data signal high 98 * to clock any confused device back into an idle state. Also send a 99 * <stop> at the end of the sequence for belts & suspenders. 100 */ 101 static void send_reset(void) 102 { 103 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 104 int j; 105 106 I2C_SCL(1); 107 I2C_SDA(1); 108 #ifdef I2C_INIT 109 I2C_INIT; 110 #endif 111 I2C_TRISTATE; 112 for(j = 0; j < 9; j++) { 113 I2C_SCL(0); 114 I2C_DELAY; 115 I2C_DELAY; 116 I2C_SCL(1); 117 I2C_DELAY; 118 I2C_DELAY; 119 } 120 send_stop(); 121 I2C_TRISTATE; 122 } 123 #endif 124 125 /*----------------------------------------------------------------------- 126 * START: High -> Low on SDA while SCL is High 127 */ 128 static void send_start(void) 129 { 130 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 131 132 I2C_DELAY; 133 I2C_SDA(1); 134 I2C_ACTIVE; 135 I2C_DELAY; 136 I2C_SCL(1); 137 I2C_DELAY; 138 I2C_SDA(0); 139 I2C_DELAY; 140 } 141 142 /*----------------------------------------------------------------------- 143 * STOP: Low -> High on SDA while SCL is High 144 */ 145 static void send_stop(void) 146 { 147 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 148 149 I2C_SCL(0); 150 I2C_DELAY; 151 I2C_SDA(0); 152 I2C_ACTIVE; 153 I2C_DELAY; 154 I2C_SCL(1); 155 I2C_DELAY; 156 I2C_SDA(1); 157 I2C_DELAY; 158 I2C_TRISTATE; 159 } 160 161 /*----------------------------------------------------------------------- 162 * ack should be I2C_ACK or I2C_NOACK 163 */ 164 static void send_ack(int ack) 165 { 166 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 167 168 I2C_SCL(0); 169 I2C_DELAY; 170 I2C_ACTIVE; 171 I2C_SDA(ack); 172 I2C_DELAY; 173 I2C_SCL(1); 174 I2C_DELAY; 175 I2C_DELAY; 176 I2C_SCL(0); 177 I2C_DELAY; 178 } 179 180 /*----------------------------------------------------------------------- 181 * Send 8 bits and look for an acknowledgement. 182 */ 183 static int write_byte(uchar data) 184 { 185 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 186 int j; 187 int nack; 188 189 I2C_ACTIVE; 190 for(j = 0; j < 8; j++) { 191 I2C_SCL(0); 192 I2C_DELAY; 193 I2C_SDA(data & 0x80); 194 I2C_DELAY; 195 I2C_SCL(1); 196 I2C_DELAY; 197 I2C_DELAY; 198 199 data <<= 1; 200 } 201 202 /* 203 * Look for an <ACK>(negative logic) and return it. 204 */ 205 I2C_SCL(0); 206 I2C_DELAY; 207 I2C_SDA(1); 208 I2C_TRISTATE; 209 I2C_DELAY; 210 I2C_SCL(1); 211 I2C_DELAY; 212 I2C_DELAY; 213 nack = I2C_READ; 214 I2C_SCL(0); 215 I2C_DELAY; 216 I2C_ACTIVE; 217 218 return(nack); /* not a nack is an ack */ 219 } 220 221 #if defined(CONFIG_I2C_MULTI_BUS) 222 /* 223 * Functions for multiple I2C bus handling 224 */ 225 unsigned int i2c_get_bus_num(void) 226 { 227 return i2c_bus_num; 228 } 229 230 int i2c_set_bus_num(unsigned int bus) 231 { 232 #if defined(CONFIG_I2C_MUX) 233 if (bus < CONFIG_SYS_MAX_I2C_BUS) { 234 i2c_bus_num = bus; 235 } else { 236 int ret; 237 238 ret = i2x_mux_select_mux(bus); 239 if (ret == 0) 240 i2c_bus_num = bus; 241 else 242 return ret; 243 } 244 #else 245 if (bus >= CONFIG_SYS_MAX_I2C_BUS) 246 return -1; 247 i2c_bus_num = bus; 248 #endif 249 return 0; 250 } 251 #endif 252 253 /*----------------------------------------------------------------------- 254 * if ack == I2C_ACK, ACK the byte so can continue reading, else 255 * send I2C_NOACK to end the read. 256 */ 257 static uchar read_byte(int ack) 258 { 259 I2C_SOFT_DECLARATIONS /* intentional without ';' */ 260 int data; 261 int j; 262 263 /* 264 * Read 8 bits, MSB first. 265 */ 266 I2C_TRISTATE; 267 I2C_SDA(1); 268 data = 0; 269 for(j = 0; j < 8; j++) { 270 I2C_SCL(0); 271 I2C_DELAY; 272 I2C_SCL(1); 273 I2C_DELAY; 274 data <<= 1; 275 data |= I2C_READ; 276 I2C_DELAY; 277 } 278 send_ack(ack); 279 280 return(data); 281 } 282 283 /*=====================================================================*/ 284 /* Public Functions */ 285 /*=====================================================================*/ 286 287 /*----------------------------------------------------------------------- 288 * Initialization 289 */ 290 void i2c_init (int speed, int slaveaddr) 291 { 292 #if defined(CONFIG_SYS_I2C_INIT_BOARD) 293 /* call board specific i2c bus reset routine before accessing the */ 294 /* environment, which might be in a chip on that bus. For details */ 295 /* about this problem see doc/I2C_Edge_Conditions. */ 296 i2c_init_board(); 297 #else 298 /* 299 * WARNING: Do NOT save speed in a static variable: if the 300 * I2C routines are called before RAM is initialized (to read 301 * the DIMM SPD, for instance), RAM won't be usable and your 302 * system will crash. 303 */ 304 send_reset (); 305 #endif 306 } 307 308 /*----------------------------------------------------------------------- 309 * Probe to see if a chip is present. Also good for checking for the 310 * completion of EEPROM writes since the chip stops responding until 311 * the write completes (typically 10mSec). 312 */ 313 int i2c_probe(uchar addr) 314 { 315 int rc; 316 317 /* 318 * perform 1 byte write transaction with just address byte 319 * (fake write) 320 */ 321 send_start(); 322 rc = write_byte ((addr << 1) | 0); 323 send_stop(); 324 325 return (rc ? 1 : 0); 326 } 327 328 /*----------------------------------------------------------------------- 329 * Read bytes 330 */ 331 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 332 { 333 int shift; 334 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", 335 chip, addr, alen, buffer, len); 336 337 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 338 /* 339 * EEPROM chips that implement "address overflow" are ones 340 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of 341 * address and the extra bits end up in the "chip address" 342 * bit slots. This makes a 24WC08 (1Kbyte) chip look like 343 * four 256 byte chips. 344 * 345 * Note that we consider the length of the address field to 346 * still be one byte because the extra address bits are 347 * hidden in the chip address. 348 */ 349 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); 350 351 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", 352 chip, addr); 353 #endif 354 355 /* 356 * Do the addressing portion of a write cycle to set the 357 * chip's address pointer. If the address length is zero, 358 * don't do the normal write cycle to set the address pointer, 359 * there is no address pointer in this chip. 360 */ 361 send_start(); 362 if(alen > 0) { 363 if(write_byte(chip << 1)) { /* write cycle */ 364 send_stop(); 365 PRINTD("i2c_read, no chip responded %02X\n", chip); 366 return(1); 367 } 368 shift = (alen-1) * 8; 369 while(alen-- > 0) { 370 if(write_byte(addr >> shift)) { 371 PRINTD("i2c_read, address not <ACK>ed\n"); 372 return(1); 373 } 374 shift -= 8; 375 } 376 377 /* Some I2C chips need a stop/start sequence here, 378 * other chips don't work with a full stop and need 379 * only a start. Default behaviour is to send the 380 * stop/start sequence. 381 */ 382 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START 383 send_start(); 384 #else 385 send_stop(); 386 send_start(); 387 #endif 388 } 389 /* 390 * Send the chip address again, this time for a read cycle. 391 * Then read the data. On the last byte, we do a NACK instead 392 * of an ACK(len == 0) to terminate the read. 393 */ 394 write_byte((chip << 1) | 1); /* read cycle */ 395 while(len-- > 0) { 396 *buffer++ = read_byte(len == 0); 397 } 398 send_stop(); 399 return(0); 400 } 401 402 /*----------------------------------------------------------------------- 403 * Write bytes 404 */ 405 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 406 { 407 int shift, failures = 0; 408 409 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n", 410 chip, addr, alen, buffer, len); 411 412 send_start(); 413 if(write_byte(chip << 1)) { /* write cycle */ 414 send_stop(); 415 PRINTD("i2c_write, no chip responded %02X\n", chip); 416 return(1); 417 } 418 shift = (alen-1) * 8; 419 while(alen-- > 0) { 420 if(write_byte(addr >> shift)) { 421 PRINTD("i2c_write, address not <ACK>ed\n"); 422 return(1); 423 } 424 shift -= 8; 425 } 426 427 while(len-- > 0) { 428 if(write_byte(*buffer++)) { 429 failures++; 430 } 431 } 432 send_stop(); 433 return(failures); 434 } 435