1 /* 2 * (C) Copyright 2015 Google, Inc 3 * 4 * (C) Copyright 2008-2014 Rockchip Electronics 5 * Peter, Software Engineering, <superpeter.cai@gmail.com>. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <clk.h> 12 #include <dm.h> 13 #include <errno.h> 14 #include <i2c.h> 15 #include <asm/io.h> 16 #include <asm/arch/clock.h> 17 #include <asm/arch/i2c.h> 18 #include <asm/arch/periph.h> 19 #include <dm/pinctrl.h> 20 #include <linux/sizes.h> 21 22 DECLARE_GLOBAL_DATA_PTR; 23 24 /* i2c timerout */ 25 #define I2C_TIMEOUT_MS 100 26 #define I2C_RETRY_COUNT 3 27 28 /* rk i2c fifo max transfer bytes */ 29 #define RK_I2C_FIFO_SIZE 32 30 31 struct rk_i2c { 32 struct clk clk; 33 struct i2c_regs *regs; 34 unsigned int speed; 35 }; 36 37 static inline void rk_i2c_get_div(int div, int *divh, int *divl) 38 { 39 *divl = div / 2; 40 if (div % 2 == 0) 41 *divh = div / 2; 42 else 43 *divh = DIV_ROUND_UP(div, 2); 44 } 45 46 /* 47 * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1) 48 * SCL = PCLK / SCLK Divisor 49 * i2c_rate = PCLK 50 */ 51 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate) 52 { 53 uint32_t i2c_rate; 54 int div, divl, divh; 55 56 /* First get i2c rate from pclk */ 57 i2c_rate = clk_get_rate(&i2c->clk); 58 59 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2; 60 divh = 0; 61 divl = 0; 62 if (div >= 0) 63 rk_i2c_get_div(div, &divh, &divl); 64 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv); 65 66 debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate, 67 scl_rate); 68 debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl); 69 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); 70 } 71 72 static void rk_i2c_show_regs(struct i2c_regs *regs) 73 { 74 #ifdef DEBUG 75 uint i; 76 77 debug("i2c_con: 0x%08x\n", readl(®s->con)); 78 debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv)); 79 debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr)); 80 debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr)); 81 debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt)); 82 debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt)); 83 debug("i2c_ien: 0x%08x\n", readl(®s->ien)); 84 debug("i2c_ipd: 0x%08x\n", readl(®s->ipd)); 85 debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt)); 86 for (i = 0; i < 8; i++) 87 debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i])); 88 for (i = 0; i < 8; i++) 89 debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i])); 90 #endif 91 } 92 93 static int rk_i2c_send_start_bit(struct rk_i2c *i2c) 94 { 95 struct i2c_regs *regs = i2c->regs; 96 ulong start; 97 98 debug("I2c Send Start bit.\n"); 99 writel(I2C_IPD_ALL_CLEAN, ®s->ipd); 100 101 writel(I2C_CON_EN | I2C_CON_START, ®s->con); 102 writel(I2C_STARTIEN, ®s->ien); 103 104 start = get_timer(0); 105 while (1) { 106 if (readl(®s->ipd) & I2C_STARTIPD) { 107 writel(I2C_STARTIPD, ®s->ipd); 108 break; 109 } 110 if (get_timer(start) > I2C_TIMEOUT_MS) { 111 debug("I2C Send Start Bit Timeout\n"); 112 rk_i2c_show_regs(regs); 113 return -ETIMEDOUT; 114 } 115 udelay(1); 116 } 117 118 return 0; 119 } 120 121 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c) 122 { 123 struct i2c_regs *regs = i2c->regs; 124 ulong start; 125 126 debug("I2c Send Stop bit.\n"); 127 writel(I2C_IPD_ALL_CLEAN, ®s->ipd); 128 129 writel(I2C_CON_EN | I2C_CON_STOP, ®s->con); 130 writel(I2C_CON_STOP, ®s->ien); 131 132 start = get_timer(0); 133 while (1) { 134 if (readl(®s->ipd) & I2C_STOPIPD) { 135 writel(I2C_STOPIPD, ®s->ipd); 136 break; 137 } 138 if (get_timer(start) > I2C_TIMEOUT_MS) { 139 debug("I2C Send Start Bit Timeout\n"); 140 rk_i2c_show_regs(regs); 141 return -ETIMEDOUT; 142 } 143 udelay(1); 144 } 145 146 return 0; 147 } 148 149 static inline void rk_i2c_disable(struct rk_i2c *i2c) 150 { 151 writel(0, &i2c->regs->con); 152 } 153 154 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, 155 uchar *buf, uint b_len) 156 { 157 struct i2c_regs *regs = i2c->regs; 158 uchar *pbuf = buf; 159 uint bytes_remain_len = b_len; 160 uint bytes_xferred = 0; 161 uint words_xferred = 0; 162 ulong start; 163 uint con = 0; 164 uint rxdata; 165 uint i, j; 166 int err; 167 168 debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n", 169 chip, reg, r_len, b_len); 170 171 err = rk_i2c_send_start_bit(i2c); 172 if (err) 173 return err; 174 175 writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr); 176 if (r_len == 0) { 177 writel(0, ®s->mrxraddr); 178 } else if (r_len < 4) { 179 writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr); 180 } else { 181 debug("I2C Read: addr len %d not supported\n", r_len); 182 return -EIO; 183 } 184 185 while (bytes_remain_len) { 186 if (bytes_remain_len > RK_I2C_FIFO_SIZE) { 187 con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX); 188 bytes_xferred = 32; 189 } else { 190 con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX) | 191 I2C_CON_LASTACK; 192 bytes_xferred = bytes_remain_len; 193 } 194 words_xferred = DIV_ROUND_UP(bytes_xferred, 4); 195 196 writel(con, ®s->con); 197 writel(bytes_xferred, ®s->mrxcnt); 198 writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien); 199 200 start = get_timer(0); 201 while (1) { 202 if (readl(®s->ipd) & I2C_NAKRCVIPD) { 203 writel(I2C_NAKRCVIPD, ®s->ipd); 204 err = -EREMOTEIO; 205 } 206 if (readl(®s->ipd) & I2C_MBRFIPD) { 207 writel(I2C_MBRFIPD, ®s->ipd); 208 break; 209 } 210 if (get_timer(start) > I2C_TIMEOUT_MS) { 211 debug("I2C Read Data Timeout\n"); 212 err = -ETIMEDOUT; 213 rk_i2c_show_regs(regs); 214 goto i2c_exit; 215 } 216 udelay(1); 217 } 218 219 for (i = 0; i < words_xferred; i++) { 220 rxdata = readl(®s->rxdata[i]); 221 debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata); 222 for (j = 0; j < 4; j++) { 223 if ((i * 4 + j) == bytes_xferred) 224 break; 225 *pbuf++ = (rxdata >> (j * 8)) & 0xff; 226 } 227 } 228 229 bytes_remain_len -= bytes_xferred; 230 debug("I2C Read bytes_remain_len %d\n", bytes_remain_len); 231 } 232 233 i2c_exit: 234 rk_i2c_send_stop_bit(i2c); 235 rk_i2c_disable(i2c); 236 237 return err; 238 } 239 240 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, 241 uchar *buf, uint b_len) 242 { 243 struct i2c_regs *regs = i2c->regs; 244 int err; 245 uchar *pbuf = buf; 246 uint bytes_remain_len = b_len + r_len + 1; 247 uint bytes_xferred = 0; 248 uint words_xferred = 0; 249 ulong start; 250 uint txdata; 251 uint i, j; 252 253 debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n", 254 chip, reg, r_len, b_len); 255 err = rk_i2c_send_start_bit(i2c); 256 if (err) 257 return err; 258 259 while (bytes_remain_len) { 260 if (bytes_remain_len > RK_I2C_FIFO_SIZE) 261 bytes_xferred = RK_I2C_FIFO_SIZE; 262 else 263 bytes_xferred = bytes_remain_len; 264 words_xferred = DIV_ROUND_UP(bytes_xferred, 4); 265 266 for (i = 0; i < words_xferred; i++) { 267 txdata = 0; 268 for (j = 0; j < 4; j++) { 269 if ((i * 4 + j) == bytes_xferred) 270 break; 271 272 if (i == 0 && j == 0 && pbuf == buf) { 273 txdata |= (chip << 1); 274 } else if (i == 0 && j <= r_len && pbuf == buf) { 275 txdata |= (reg & 276 (0xff << ((j - 1) * 8))) << 8; 277 } else { 278 txdata |= (*pbuf++)<<(j * 8); 279 } 280 } 281 writel(txdata, ®s->txdata[i]); 282 debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata); 283 } 284 285 writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con); 286 writel(bytes_xferred, ®s->mtxcnt); 287 writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien); 288 289 start = get_timer(0); 290 while (1) { 291 if (readl(®s->ipd) & I2C_NAKRCVIPD) { 292 writel(I2C_NAKRCVIPD, ®s->ipd); 293 err = -EREMOTEIO; 294 } 295 if (readl(®s->ipd) & I2C_MBTFIPD) { 296 writel(I2C_MBTFIPD, ®s->ipd); 297 break; 298 } 299 if (get_timer(start) > I2C_TIMEOUT_MS) { 300 debug("I2C Write Data Timeout\n"); 301 err = -ETIMEDOUT; 302 rk_i2c_show_regs(regs); 303 goto i2c_exit; 304 } 305 udelay(1); 306 } 307 308 bytes_remain_len -= bytes_xferred; 309 debug("I2C Write bytes_remain_len %d\n", bytes_remain_len); 310 } 311 312 i2c_exit: 313 rk_i2c_send_stop_bit(i2c); 314 rk_i2c_disable(i2c); 315 316 return err; 317 } 318 319 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, 320 int nmsgs) 321 { 322 struct rk_i2c *i2c = dev_get_priv(bus); 323 int ret; 324 325 debug("i2c_xfer: %d messages\n", nmsgs); 326 for (; nmsgs > 0; nmsgs--, msg++) { 327 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); 328 if (msg->flags & I2C_M_RD) { 329 ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf, 330 msg->len); 331 } else { 332 ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf, 333 msg->len); 334 } 335 if (ret) { 336 debug("i2c_write: error sending\n"); 337 return -EREMOTEIO; 338 } 339 } 340 341 return 0; 342 } 343 344 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) 345 { 346 struct rk_i2c *i2c = dev_get_priv(bus); 347 348 rk_i2c_set_clk(i2c, speed); 349 350 return 0; 351 } 352 353 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus) 354 { 355 struct rk_i2c *priv = dev_get_priv(bus); 356 int ret; 357 358 ret = clk_get_by_index(bus, 0, &priv->clk); 359 if (ret < 0) { 360 debug("%s: Could not get clock for %s: %d\n", __func__, 361 bus->name, ret); 362 return ret; 363 } 364 365 return 0; 366 } 367 368 static int rockchip_i2c_probe(struct udevice *bus) 369 { 370 struct rk_i2c *priv = dev_get_priv(bus); 371 372 priv->regs = (void *)dev_get_addr(bus); 373 374 return 0; 375 } 376 377 static const struct dm_i2c_ops rockchip_i2c_ops = { 378 .xfer = rockchip_i2c_xfer, 379 .set_bus_speed = rockchip_i2c_set_bus_speed, 380 }; 381 382 static const struct udevice_id rockchip_i2c_ids[] = { 383 { .compatible = "rockchip,rk3066-i2c" }, 384 { .compatible = "rockchip,rk3188-i2c" }, 385 { .compatible = "rockchip,rk3288-i2c" }, 386 { } 387 }; 388 389 U_BOOT_DRIVER(i2c_rockchip) = { 390 .name = "i2c_rockchip", 391 .id = UCLASS_I2C, 392 .of_match = rockchip_i2c_ids, 393 .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata, 394 .probe = rockchip_i2c_probe, 395 .priv_auto_alloc_size = sizeof(struct rk_i2c), 396 .ops = &rockchip_i2c_ops, 397 }; 398