1 /* 2 * Basic I2C functions 3 * 4 * Copyright (c) 2004 Texas Instruments 5 * 6 * This package is free software; you can redistribute it and/or 7 * modify it under the terms of the license found in the file 8 * named COPYING that should have accompanied this file. 9 * 10 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 11 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 12 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 13 * 14 * Author: Jian Zhang jzhang@ti.com, Texas Instruments 15 * 16 * Copyright (c) 2003 Wolfgang Denk, wd@denx.de 17 * Rewritten to fit into the current U-Boot framework 18 * 19 * Adapted for OMAP2420 I2C, r-woodruff2@ti.com 20 * 21 */ 22 23 #include <common.h> 24 25 #include <asm/arch/i2c.h> 26 #include <asm/io.h> 27 28 #include "omap24xx_i2c.h" 29 30 DECLARE_GLOBAL_DATA_PTR; 31 32 #define I2C_TIMEOUT 1000 33 34 static void wait_for_bb(void); 35 static u16 wait_for_pin(void); 36 static void flush_fifo(void); 37 38 static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE; 39 40 static unsigned int bus_initialized[I2C_BUS_MAX]; 41 static unsigned int current_bus; 42 43 void i2c_init(int speed, int slaveadd) 44 { 45 int psc, fsscll, fssclh; 46 int hsscll = 0, hssclh = 0; 47 u32 scll, sclh; 48 int timeout = I2C_TIMEOUT; 49 50 /* Only handle standard, fast and high speeds */ 51 if ((speed != OMAP_I2C_STANDARD) && 52 (speed != OMAP_I2C_FAST_MODE) && 53 (speed != OMAP_I2C_HIGH_SPEED)) { 54 printf("Error : I2C unsupported speed %d\n", speed); 55 return; 56 } 57 58 psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK; 59 psc -= 1; 60 if (psc < I2C_PSC_MIN) { 61 printf("Error : I2C unsupported prescalar %d\n", psc); 62 return; 63 } 64 65 if (speed == OMAP_I2C_HIGH_SPEED) { 66 /* High speed */ 67 68 /* For first phase of HS mode */ 69 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / 70 (2 * OMAP_I2C_FAST_MODE); 71 72 fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM; 73 fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM; 74 if (((fsscll < 0) || (fssclh < 0)) || 75 ((fsscll > 255) || (fssclh > 255))) { 76 printf("Error : I2C initializing first phase clock\n"); 77 return; 78 } 79 80 /* For second phase of HS mode */ 81 hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); 82 83 hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM; 84 hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM; 85 if (((fsscll < 0) || (fssclh < 0)) || 86 ((fsscll > 255) || (fssclh > 255))) { 87 printf("Error : I2C initializing second phase clock\n"); 88 return; 89 } 90 91 scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll; 92 sclh = (unsigned int)hssclh << 8 | (unsigned int)fssclh; 93 94 } else { 95 /* Standard and fast speed */ 96 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); 97 98 fsscll -= I2C_FASTSPEED_SCLL_TRIM; 99 fssclh -= I2C_FASTSPEED_SCLH_TRIM; 100 if (((fsscll < 0) || (fssclh < 0)) || 101 ((fsscll > 255) || (fssclh > 255))) { 102 printf("Error : I2C initializing clock\n"); 103 return; 104 } 105 106 scll = (unsigned int)fsscll; 107 sclh = (unsigned int)fssclh; 108 } 109 110 if (readw(&i2c_base->con) & I2C_CON_EN) { 111 writew(0, &i2c_base->con); 112 udelay(50000); 113 } 114 115 writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */ 116 udelay(1000); 117 118 writew(I2C_CON_EN, &i2c_base->con); 119 while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) { 120 if (timeout <= 0) { 121 printf("ERROR: Timeout in soft-reset\n"); 122 return; 123 } 124 udelay(1000); 125 } 126 127 writew(0, &i2c_base->con); 128 writew(psc, &i2c_base->psc); 129 writew(scll, &i2c_base->scll); 130 writew(sclh, &i2c_base->sclh); 131 132 /* own address */ 133 writew(slaveadd, &i2c_base->oa); 134 writew(I2C_CON_EN, &i2c_base->con); 135 136 /* have to enable intrrupts or OMAP i2c module doesn't work */ 137 writew(I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | 138 I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie); 139 udelay(1000); 140 flush_fifo(); 141 writew(0xFFFF, &i2c_base->stat); 142 writew(0, &i2c_base->cnt); 143 144 if (gd->flags & GD_FLG_RELOC) 145 bus_initialized[current_bus] = 1; 146 } 147 148 static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value) 149 { 150 int i2c_error = 0; 151 u16 status; 152 153 /* wait until bus not busy */ 154 wait_for_bb(); 155 156 /* one byte only */ 157 writew(1, &i2c_base->cnt); 158 /* set slave address */ 159 writew(devaddr, &i2c_base->sa); 160 /* no stop bit needed here */ 161 writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | 162 I2C_CON_TRX, &i2c_base->con); 163 164 /* send register offset */ 165 while (1) { 166 status = wait_for_pin(); 167 if (status == 0 || status & I2C_STAT_NACK) { 168 i2c_error = 1; 169 goto read_exit; 170 } 171 if (status & I2C_STAT_XRDY) { 172 /* Important: have to use byte access */ 173 writeb(regoffset, &i2c_base->data); 174 writew(I2C_STAT_XRDY, &i2c_base->stat); 175 } 176 if (status & I2C_STAT_ARDY) { 177 writew(I2C_STAT_ARDY, &i2c_base->stat); 178 break; 179 } 180 } 181 182 /* set slave address */ 183 writew(devaddr, &i2c_base->sa); 184 /* read one byte from slave */ 185 writew(1, &i2c_base->cnt); 186 /* need stop bit here */ 187 writew(I2C_CON_EN | I2C_CON_MST | 188 I2C_CON_STT | I2C_CON_STP, 189 &i2c_base->con); 190 191 /* receive data */ 192 while (1) { 193 status = wait_for_pin(); 194 if (status == 0 || status & I2C_STAT_NACK) { 195 i2c_error = 1; 196 goto read_exit; 197 } 198 if (status & I2C_STAT_RRDY) { 199 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \ 200 defined(CONFIG_OMAP44XX) 201 *value = readb(&i2c_base->data); 202 #else 203 *value = readw(&i2c_base->data); 204 #endif 205 writew(I2C_STAT_RRDY, &i2c_base->stat); 206 } 207 if (status & I2C_STAT_ARDY) { 208 writew(I2C_STAT_ARDY, &i2c_base->stat); 209 break; 210 } 211 } 212 213 read_exit: 214 flush_fifo(); 215 writew(0xFFFF, &i2c_base->stat); 216 writew(0, &i2c_base->cnt); 217 return i2c_error; 218 } 219 220 static void flush_fifo(void) 221 { u16 stat; 222 223 /* note: if you try and read data when its not there or ready 224 * you get a bus error 225 */ 226 while (1) { 227 stat = readw(&i2c_base->stat); 228 if (stat == I2C_STAT_RRDY) { 229 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \ 230 defined(CONFIG_OMAP44XX) 231 readb(&i2c_base->data); 232 #else 233 readw(&i2c_base->data); 234 #endif 235 writew(I2C_STAT_RRDY, &i2c_base->stat); 236 udelay(1000); 237 } else 238 break; 239 } 240 } 241 242 int i2c_probe(uchar chip) 243 { 244 u16 status; 245 int res = 1; /* default = fail */ 246 247 if (chip == readw(&i2c_base->oa)) 248 return res; 249 250 /* wait until bus not busy */ 251 wait_for_bb(); 252 253 /* try to write one byte */ 254 writew(1, &i2c_base->cnt); 255 /* set slave address */ 256 writew(chip, &i2c_base->sa); 257 /* stop bit needed here */ 258 writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | 259 I2C_CON_STP, &i2c_base->con); 260 261 status = wait_for_pin(); 262 263 /* check for ACK (!NAK) */ 264 if (!(status & I2C_STAT_NACK)) 265 res = 0; 266 267 /* abort transfer (force idle state) */ 268 writew(0, &i2c_base->con); 269 270 flush_fifo(); 271 /* don't allow any more data in... we don't want it. */ 272 writew(0, &i2c_base->cnt); 273 writew(0xFFFF, &i2c_base->stat); 274 return res; 275 } 276 277 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 278 { 279 int i; 280 281 if (alen > 1) { 282 printf("I2C read: addr len %d not supported\n", alen); 283 return 1; 284 } 285 286 if (addr + len > 256) { 287 printf("I2C read: address out of range\n"); 288 return 1; 289 } 290 291 for (i = 0; i < len; i++) { 292 if (i2c_read_byte(chip, addr + i, &buffer[i])) { 293 printf("I2C read: I/O error\n"); 294 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 295 return 1; 296 } 297 } 298 299 return 0; 300 } 301 302 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 303 { 304 int i; 305 u16 status; 306 int i2c_error = 0; 307 308 if (alen > 1) { 309 printf("I2C write: addr len %d not supported\n", alen); 310 return 1; 311 } 312 313 if (addr + len > 256) { 314 printf("I2C write: address 0x%x + 0x%x out of range\n", 315 addr, len); 316 return 1; 317 } 318 319 /* wait until bus not busy */ 320 wait_for_bb(); 321 322 /* start address phase - will write regoffset + len bytes data */ 323 /* TODO consider case when !CONFIG_OMAP243X/34XX/44XX */ 324 writew(alen + len, &i2c_base->cnt); 325 /* set slave address */ 326 writew(chip, &i2c_base->sa); 327 /* stop bit needed here */ 328 writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | 329 I2C_CON_STP, &i2c_base->con); 330 331 /* Send address byte */ 332 status = wait_for_pin(); 333 334 if (status == 0 || status & I2C_STAT_NACK) { 335 i2c_error = 1; 336 printf("error waiting for i2c address ACK (status=0x%x)\n", 337 status); 338 goto write_exit; 339 } 340 341 if (status & I2C_STAT_XRDY) { 342 writeb(addr & 0xFF, &i2c_base->data); 343 writew(I2C_STAT_XRDY, &i2c_base->stat); 344 } else { 345 i2c_error = 1; 346 printf("i2c bus not ready for transmit (status=0x%x)\n", 347 status); 348 goto write_exit; 349 } 350 351 /* address phase is over, now write data */ 352 for (i = 0; i < len; i++) { 353 status = wait_for_pin(); 354 355 if (status == 0 || status & I2C_STAT_NACK) { 356 i2c_error = 1; 357 printf("i2c error waiting for data ACK (status=0x%x)\n", 358 status); 359 goto write_exit; 360 } 361 362 if (status & I2C_STAT_XRDY) { 363 writeb(buffer[i], &i2c_base->data); 364 writew(I2C_STAT_XRDY, &i2c_base->stat); 365 } else { 366 i2c_error = 1; 367 printf("i2c bus not ready for Tx (i=%d)\n", i); 368 goto write_exit; 369 } 370 } 371 372 write_exit: 373 flush_fifo(); 374 writew(0xFFFF, &i2c_base->stat); 375 return i2c_error; 376 } 377 378 static void wait_for_bb(void) 379 { 380 int timeout = I2C_TIMEOUT; 381 u16 stat; 382 383 writew(0xFFFF, &i2c_base->stat); /* clear current interrupts...*/ 384 while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) { 385 writew(stat, &i2c_base->stat); 386 udelay(1000); 387 } 388 389 if (timeout <= 0) { 390 printf("timed out in wait_for_bb: I2C_STAT=%x\n", 391 readw(&i2c_base->stat)); 392 } 393 writew(0xFFFF, &i2c_base->stat); /* clear delayed stuff*/ 394 } 395 396 static u16 wait_for_pin(void) 397 { 398 u16 status; 399 int timeout = I2C_TIMEOUT; 400 401 do { 402 udelay(1000); 403 status = readw(&i2c_base->stat); 404 } while (!(status & 405 (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY | 406 I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK | 407 I2C_STAT_AL)) && timeout--); 408 409 if (timeout <= 0) { 410 printf("timed out in wait_for_pin: I2C_STAT=%x\n", 411 readw(&i2c_base->stat)); 412 writew(0xFFFF, &i2c_base->stat); 413 status = 0; 414 } 415 416 return status; 417 } 418 419 int i2c_set_bus_num(unsigned int bus) 420 { 421 if ((bus < 0) || (bus >= I2C_BUS_MAX)) { 422 printf("Bad bus: %d\n", bus); 423 return -1; 424 } 425 426 #if I2C_BUS_MAX == 3 427 if (bus == 2) 428 i2c_base = (struct i2c *)I2C_BASE3; 429 else 430 #endif 431 if (bus == 1) 432 i2c_base = (struct i2c *)I2C_BASE2; 433 else 434 i2c_base = (struct i2c *)I2C_BASE1; 435 436 current_bus = bus; 437 438 if (!bus_initialized[current_bus]) 439 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 440 441 return 0; 442 } 443 444 int i2c_get_bus_num(void) 445 { 446 return (int) current_bus; 447 } 448