1 /* 2 * (C) Copyright 2000 3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it 4 * 5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com> 6 * Marius Groeger <mgroeger@sysgo.de> 7 * 8 * (C) Copyright 2003 Pengutronix e.K. 9 * Robert Schwebel <r.schwebel@pengutronix.de> 10 * 11 * (C) Copyright 2011 Marvell Inc. 12 * Lei Wen <leiwen@marvell.com> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 * Back ported to the 8xx platform (from the 8260 platform) by 33 * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 34 */ 35 36 #include <common.h> 37 #include <asm/io.h> 38 39 #ifdef CONFIG_HARD_I2C 40 #include <i2c.h> 41 #include "mv_i2c.h" 42 43 #ifdef DEBUG_I2C 44 #define PRINTD(x) printf x 45 #else 46 #define PRINTD(x) 47 #endif 48 49 /* All transfers are described by this data structure */ 50 struct i2c_msg { 51 u8 condition; 52 u8 acknack; 53 u8 direction; 54 u8 data; 55 }; 56 57 struct mv_i2c { 58 u32 ibmr; 59 u32 pad0; 60 u32 idbr; 61 u32 pad1; 62 u32 icr; 63 u32 pad2; 64 u32 isr; 65 u32 pad3; 66 u32 isar; 67 }; 68 69 static struct mv_i2c *base; 70 static void i2c_board_init(struct mv_i2c *base) 71 { 72 #ifdef CONFIG_SYS_I2C_INIT_BOARD 73 u32 icr; 74 /* 75 * call board specific i2c bus reset routine before accessing the 76 * environment, which might be in a chip on that bus. For details 77 * about this problem see doc/I2C_Edge_Conditions. 78 * 79 * disable I2C controller first, otherwhise it thinks we want to 80 * talk to the slave port... 81 */ 82 icr = readl(&base->icr); 83 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); 84 85 i2c_init_board(); 86 87 writel(icr, &base->icr); 88 #endif 89 } 90 91 #ifdef CONFIG_I2C_MULTI_BUS 92 static u32 i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG; 93 static unsigned int bus_initialized[CONFIG_MV_I2C_NUM]; 94 static unsigned int current_bus; 95 96 int i2c_set_bus_num(unsigned int bus) 97 { 98 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) { 99 printf("Bad bus: %d\n", bus); 100 return -1; 101 } 102 103 base = (struct mv_i2c *)i2c_regs[bus]; 104 current_bus = bus; 105 106 if (!bus_initialized[current_bus]) { 107 i2c_board_init(base); 108 bus_initialized[current_bus] = 1; 109 } 110 111 return 0; 112 } 113 114 unsigned int i2c_get_bus_num(void) 115 { 116 return current_bus; 117 } 118 #endif 119 120 /* 121 * i2c_reset: - reset the host controller 122 * 123 */ 124 static void i2c_reset(void) 125 { 126 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 127 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */ 128 udelay(100); 129 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 130 131 i2c_clk_enable(); 132 133 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */ 134 writel(I2C_ICR_INIT, &base->icr); /* set control reg values */ 135 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */ 136 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ 137 udelay(100); 138 } 139 140 /* 141 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register 142 * are set and cleared 143 * 144 * @return: 1 in case of success, 0 means timeout (no match within 10 ms). 145 */ 146 static int i2c_isr_set_cleared(unsigned long set_mask, 147 unsigned long cleared_mask) 148 { 149 int timeout = 1000, isr; 150 151 do { 152 isr = readl(&base->isr); 153 udelay(10); 154 if (timeout-- < 0) 155 return 0; 156 } while (((isr & set_mask) != set_mask) 157 || ((isr & cleared_mask) != 0)); 158 159 return 1; 160 } 161 162 /* 163 * i2c_transfer: - Transfer one byte over the i2c bus 164 * 165 * This function can tranfer a byte over the i2c bus in both directions. 166 * It is used by the public API functions. 167 * 168 * @return: 0: transfer successful 169 * -1: message is empty 170 * -2: transmit timeout 171 * -3: ACK missing 172 * -4: receive timeout 173 * -5: illegal parameters 174 * -6: bus is busy and couldn't be aquired 175 */ 176 int i2c_transfer(struct i2c_msg *msg) 177 { 178 int ret; 179 180 if (!msg) 181 goto transfer_error_msg_empty; 182 183 switch (msg->direction) { 184 case I2C_WRITE: 185 /* check if bus is not busy */ 186 if (!i2c_isr_set_cleared(0, ISR_IBB)) 187 goto transfer_error_bus_busy; 188 189 /* start transmission */ 190 writel(readl(&base->icr) & ~ICR_START, &base->icr); 191 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 192 writel(msg->data, &base->idbr); 193 if (msg->condition == I2C_COND_START) 194 writel(readl(&base->icr) | ICR_START, &base->icr); 195 if (msg->condition == I2C_COND_STOP) 196 writel(readl(&base->icr) | ICR_STOP, &base->icr); 197 if (msg->acknack == I2C_ACKNAK_SENDNAK) 198 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 199 if (msg->acknack == I2C_ACKNAK_SENDACK) 200 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 201 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 202 writel(readl(&base->icr) | ICR_TB, &base->icr); 203 204 /* transmit register empty? */ 205 if (!i2c_isr_set_cleared(ISR_ITE, 0)) 206 goto transfer_error_transmit_timeout; 207 208 /* clear 'transmit empty' state */ 209 writel(readl(&base->isr) | ISR_ITE, &base->isr); 210 211 /* wait for ACK from slave */ 212 if (msg->acknack == I2C_ACKNAK_WAITACK) 213 if (!i2c_isr_set_cleared(0, ISR_ACKNAK)) 214 goto transfer_error_ack_missing; 215 break; 216 217 case I2C_READ: 218 219 /* check if bus is not busy */ 220 if (!i2c_isr_set_cleared(0, ISR_IBB)) 221 goto transfer_error_bus_busy; 222 223 /* start receive */ 224 writel(readl(&base->icr) & ~ICR_START, &base->icr); 225 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 226 if (msg->condition == I2C_COND_START) 227 writel(readl(&base->icr) | ICR_START, &base->icr); 228 if (msg->condition == I2C_COND_STOP) 229 writel(readl(&base->icr) | ICR_STOP, &base->icr); 230 if (msg->acknack == I2C_ACKNAK_SENDNAK) 231 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 232 if (msg->acknack == I2C_ACKNAK_SENDACK) 233 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 234 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 235 writel(readl(&base->icr) | ICR_TB, &base->icr); 236 237 /* receive register full? */ 238 if (!i2c_isr_set_cleared(ISR_IRF, 0)) 239 goto transfer_error_receive_timeout; 240 241 msg->data = readl(&base->idbr); 242 243 /* clear 'receive empty' state */ 244 writel(readl(&base->isr) | ISR_IRF, &base->isr); 245 break; 246 default: 247 goto transfer_error_illegal_param; 248 } 249 250 return 0; 251 252 transfer_error_msg_empty: 253 PRINTD(("i2c_transfer: error: 'msg' is empty\n")); 254 ret = -1; goto i2c_transfer_finish; 255 256 transfer_error_transmit_timeout: 257 PRINTD(("i2c_transfer: error: transmit timeout\n")); 258 ret = -2; goto i2c_transfer_finish; 259 260 transfer_error_ack_missing: 261 PRINTD(("i2c_transfer: error: ACK missing\n")); 262 ret = -3; goto i2c_transfer_finish; 263 264 transfer_error_receive_timeout: 265 PRINTD(("i2c_transfer: error: receive timeout\n")); 266 ret = -4; goto i2c_transfer_finish; 267 268 transfer_error_illegal_param: 269 PRINTD(("i2c_transfer: error: illegal parameters\n")); 270 ret = -5; goto i2c_transfer_finish; 271 272 transfer_error_bus_busy: 273 PRINTD(("i2c_transfer: error: bus is busy\n")); 274 ret = -6; goto i2c_transfer_finish; 275 276 i2c_transfer_finish: 277 PRINTD(("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr))); 278 i2c_reset(); 279 return ret; 280 } 281 282 /* ------------------------------------------------------------------------ */ 283 /* API Functions */ 284 /* ------------------------------------------------------------------------ */ 285 void i2c_init(int speed, int slaveaddr) 286 { 287 #ifdef CONFIG_I2C_MULTI_BUS 288 current_bus = 0; 289 base = (struct mv_i2c *)i2c_regs[current_bus]; 290 #else 291 base = (struct mv_i2c *)CONFIG_MV_I2C_REG; 292 #endif 293 294 i2c_board_init(base); 295 } 296 297 /* 298 * i2c_probe: - Test if a chip answers for a given i2c address 299 * 300 * @chip: address of the chip which is searched for 301 * @return: 0 if a chip was found, -1 otherwhise 302 */ 303 int i2c_probe(uchar chip) 304 { 305 struct i2c_msg msg; 306 307 i2c_reset(); 308 309 msg.condition = I2C_COND_START; 310 msg.acknack = I2C_ACKNAK_WAITACK; 311 msg.direction = I2C_WRITE; 312 msg.data = (chip << 1) + 1; 313 if (i2c_transfer(&msg)) 314 return -1; 315 316 msg.condition = I2C_COND_STOP; 317 msg.acknack = I2C_ACKNAK_SENDNAK; 318 msg.direction = I2C_READ; 319 msg.data = 0x00; 320 if (i2c_transfer(&msg)) 321 return -1; 322 323 return 0; 324 } 325 326 /* 327 * i2c_read: - Read multiple bytes from an i2c device 328 * 329 * The higher level routines take into account that this function is only 330 * called with len < page length of the device (see configuration file) 331 * 332 * @chip: address of the chip which is to be read 333 * @addr: i2c data address within the chip 334 * @alen: length of the i2c data address (1..2 bytes) 335 * @buffer: where to write the data 336 * @len: how much byte do we want to read 337 * @return: 0 in case of success 338 */ 339 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 340 { 341 struct i2c_msg msg; 342 u8 addr_bytes[3]; /* lowest...highest byte of data address */ 343 344 PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 345 "len=0x%02x)\n", chip, addr, alen, len)); 346 347 i2c_reset(); 348 349 /* dummy chip address write */ 350 PRINTD(("i2c_read: dummy chip address write\n")); 351 msg.condition = I2C_COND_START; 352 msg.acknack = I2C_ACKNAK_WAITACK; 353 msg.direction = I2C_WRITE; 354 msg.data = (chip << 1); 355 msg.data &= 0xFE; 356 if (i2c_transfer(&msg)) 357 return -1; 358 359 /* 360 * send memory address bytes; 361 * alen defines how much bytes we have to send. 362 */ 363 /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */ 364 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 365 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 366 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 367 368 while (--alen >= 0) { 369 PRINTD(("i2c_read: send memory word address byte %1d\n", alen)); 370 msg.condition = I2C_COND_NORMAL; 371 msg.acknack = I2C_ACKNAK_WAITACK; 372 msg.direction = I2C_WRITE; 373 msg.data = addr_bytes[alen]; 374 if (i2c_transfer(&msg)) 375 return -1; 376 } 377 378 /* start read sequence */ 379 PRINTD(("i2c_read: start read sequence\n")); 380 msg.condition = I2C_COND_START; 381 msg.acknack = I2C_ACKNAK_WAITACK; 382 msg.direction = I2C_WRITE; 383 msg.data = (chip << 1); 384 msg.data |= 0x01; 385 if (i2c_transfer(&msg)) 386 return -1; 387 388 /* read bytes; send NACK at last byte */ 389 while (len--) { 390 if (len == 0) { 391 msg.condition = I2C_COND_STOP; 392 msg.acknack = I2C_ACKNAK_SENDNAK; 393 } else { 394 msg.condition = I2C_COND_NORMAL; 395 msg.acknack = I2C_ACKNAK_SENDACK; 396 } 397 398 msg.direction = I2C_READ; 399 msg.data = 0x00; 400 if (i2c_transfer(&msg)) 401 return -1; 402 403 *buffer = msg.data; 404 PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n", 405 (unsigned int)buffer, *buffer)); 406 buffer++; 407 } 408 409 i2c_reset(); 410 411 return 0; 412 } 413 414 /* 415 * i2c_write: - Write multiple bytes to an i2c device 416 * 417 * The higher level routines take into account that this function is only 418 * called with len < page length of the device (see configuration file) 419 * 420 * @chip: address of the chip which is to be written 421 * @addr: i2c data address within the chip 422 * @alen: length of the i2c data address (1..2 bytes) 423 * @buffer: where to find the data to be written 424 * @len: how much byte do we want to read 425 * @return: 0 in case of success 426 */ 427 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 428 { 429 struct i2c_msg msg; 430 u8 addr_bytes[3]; /* lowest...highest byte of data address */ 431 432 PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 433 "len=0x%02x)\n", chip, addr, alen, len)); 434 435 i2c_reset(); 436 437 /* chip address write */ 438 PRINTD(("i2c_write: chip address write\n")); 439 msg.condition = I2C_COND_START; 440 msg.acknack = I2C_ACKNAK_WAITACK; 441 msg.direction = I2C_WRITE; 442 msg.data = (chip << 1); 443 msg.data &= 0xFE; 444 if (i2c_transfer(&msg)) 445 return -1; 446 447 /* 448 * send memory address bytes; 449 * alen defines how much bytes we have to send. 450 */ 451 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 452 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 453 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 454 455 while (--alen >= 0) { 456 PRINTD(("i2c_write: send memory word address\n")); 457 msg.condition = I2C_COND_NORMAL; 458 msg.acknack = I2C_ACKNAK_WAITACK; 459 msg.direction = I2C_WRITE; 460 msg.data = addr_bytes[alen]; 461 if (i2c_transfer(&msg)) 462 return -1; 463 } 464 465 /* write bytes; send NACK at last byte */ 466 while (len--) { 467 PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n", 468 (unsigned int)buffer, *buffer)); 469 470 if (len == 0) 471 msg.condition = I2C_COND_STOP; 472 else 473 msg.condition = I2C_COND_NORMAL; 474 475 msg.acknack = I2C_ACKNAK_WAITACK; 476 msg.direction = I2C_WRITE; 477 msg.data = *(buffer++); 478 479 if (i2c_transfer(&msg)) 480 return -1; 481 } 482 483 i2c_reset(); 484 485 return 0; 486 } 487 #endif /* CONFIG_HARD_I2C */ 488