1 /* 2 * (C) Copyright 2000 3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it 4 * 5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com> 6 * Marius Groeger <mgroeger@sysgo.de> 7 * 8 * (C) Copyright 2003 Pengutronix e.K. 9 * Robert Schwebel <r.schwebel@pengutronix.de> 10 * 11 * (C) Copyright 2011 Marvell Inc. 12 * Lei Wen <leiwen@marvell.com> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 * Back ported to the 8xx platform (from the 8260 platform) by 33 * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 34 */ 35 36 #include <common.h> 37 #include <asm/io.h> 38 39 #ifdef CONFIG_HARD_I2C 40 #include <i2c.h> 41 #include "mv_i2c.h" 42 43 #ifdef DEBUG_I2C 44 #define PRINTD(x) printf x 45 #else 46 #define PRINTD(x) 47 #endif 48 49 /* All transfers are described by this data structure */ 50 struct i2c_msg { 51 u8 condition; 52 u8 acknack; 53 u8 direction; 54 u8 data; 55 }; 56 57 struct mv_i2c { 58 u32 ibmr; 59 u32 pad0; 60 u32 idbr; 61 u32 pad1; 62 u32 icr; 63 u32 pad2; 64 u32 isr; 65 u32 pad3; 66 u32 isar; 67 }; 68 69 static struct mv_i2c *base; 70 #ifdef CONFIG_I2C_MULTI_BUS 71 static u32 i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG; 72 static unsigned int bus_initialized[CONFIG_MV_I2C_NUM]; 73 static unsigned int current_bus; 74 75 int i2c_set_bus_num(unsigned int bus) 76 { 77 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) { 78 printf("Bad bus: %d\n", bus); 79 return -1; 80 } 81 82 base = (struct mv_i2c *)i2c_regs[bus]; 83 current_bus = bus; 84 85 if (!bus_initialized[current_bus]) { 86 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 87 bus_initialized[current_bus] = 1; 88 } 89 90 return 0; 91 } 92 93 unsigned int i2c_get_bus_num(void) 94 { 95 return current_bus; 96 } 97 #endif 98 99 /* 100 * i2c_reset: - reset the host controller 101 * 102 */ 103 static void i2c_reset(void) 104 { 105 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 106 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */ 107 udelay(100); 108 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 109 110 i2c_clk_enable(); 111 112 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */ 113 writel(I2C_ICR_INIT, &base->icr); /* set control reg values */ 114 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */ 115 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ 116 udelay(100); 117 } 118 119 /* 120 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register 121 * are set and cleared 122 * 123 * @return: 1 in case of success, 0 means timeout (no match within 10 ms). 124 */ 125 static int i2c_isr_set_cleared(unsigned long set_mask, 126 unsigned long cleared_mask) 127 { 128 int timeout = 1000, isr; 129 130 do { 131 isr = readl(&base->isr); 132 udelay(10); 133 if (timeout-- < 0) 134 return 0; 135 } while (((isr & set_mask) != set_mask) 136 || ((isr & cleared_mask) != 0)); 137 138 return 1; 139 } 140 141 /* 142 * i2c_transfer: - Transfer one byte over the i2c bus 143 * 144 * This function can tranfer a byte over the i2c bus in both directions. 145 * It is used by the public API functions. 146 * 147 * @return: 0: transfer successful 148 * -1: message is empty 149 * -2: transmit timeout 150 * -3: ACK missing 151 * -4: receive timeout 152 * -5: illegal parameters 153 * -6: bus is busy and couldn't be aquired 154 */ 155 int i2c_transfer(struct i2c_msg *msg) 156 { 157 int ret; 158 159 if (!msg) 160 goto transfer_error_msg_empty; 161 162 switch (msg->direction) { 163 case I2C_WRITE: 164 /* check if bus is not busy */ 165 if (!i2c_isr_set_cleared(0, ISR_IBB)) 166 goto transfer_error_bus_busy; 167 168 /* start transmission */ 169 writel(readl(&base->icr) & ~ICR_START, &base->icr); 170 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 171 writel(msg->data, &base->idbr); 172 if (msg->condition == I2C_COND_START) 173 writel(readl(&base->icr) | ICR_START, &base->icr); 174 if (msg->condition == I2C_COND_STOP) 175 writel(readl(&base->icr) | ICR_STOP, &base->icr); 176 if (msg->acknack == I2C_ACKNAK_SENDNAK) 177 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 178 if (msg->acknack == I2C_ACKNAK_SENDACK) 179 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 180 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 181 writel(readl(&base->icr) | ICR_TB, &base->icr); 182 183 /* transmit register empty? */ 184 if (!i2c_isr_set_cleared(ISR_ITE, 0)) 185 goto transfer_error_transmit_timeout; 186 187 /* clear 'transmit empty' state */ 188 writel(readl(&base->isr) | ISR_ITE, &base->isr); 189 190 /* wait for ACK from slave */ 191 if (msg->acknack == I2C_ACKNAK_WAITACK) 192 if (!i2c_isr_set_cleared(0, ISR_ACKNAK)) 193 goto transfer_error_ack_missing; 194 break; 195 196 case I2C_READ: 197 198 /* check if bus is not busy */ 199 if (!i2c_isr_set_cleared(0, ISR_IBB)) 200 goto transfer_error_bus_busy; 201 202 /* start receive */ 203 writel(readl(&base->icr) & ~ICR_START, &base->icr); 204 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 205 if (msg->condition == I2C_COND_START) 206 writel(readl(&base->icr) | ICR_START, &base->icr); 207 if (msg->condition == I2C_COND_STOP) 208 writel(readl(&base->icr) | ICR_STOP, &base->icr); 209 if (msg->acknack == I2C_ACKNAK_SENDNAK) 210 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 211 if (msg->acknack == I2C_ACKNAK_SENDACK) 212 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 213 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 214 writel(readl(&base->icr) | ICR_TB, &base->icr); 215 216 /* receive register full? */ 217 if (!i2c_isr_set_cleared(ISR_IRF, 0)) 218 goto transfer_error_receive_timeout; 219 220 msg->data = readl(&base->idbr); 221 222 /* clear 'receive empty' state */ 223 writel(readl(&base->isr) | ISR_IRF, &base->isr); 224 break; 225 default: 226 goto transfer_error_illegal_param; 227 } 228 229 return 0; 230 231 transfer_error_msg_empty: 232 PRINTD(("i2c_transfer: error: 'msg' is empty\n")); 233 ret = -1; goto i2c_transfer_finish; 234 235 transfer_error_transmit_timeout: 236 PRINTD(("i2c_transfer: error: transmit timeout\n")); 237 ret = -2; goto i2c_transfer_finish; 238 239 transfer_error_ack_missing: 240 PRINTD(("i2c_transfer: error: ACK missing\n")); 241 ret = -3; goto i2c_transfer_finish; 242 243 transfer_error_receive_timeout: 244 PRINTD(("i2c_transfer: error: receive timeout\n")); 245 ret = -4; goto i2c_transfer_finish; 246 247 transfer_error_illegal_param: 248 PRINTD(("i2c_transfer: error: illegal parameters\n")); 249 ret = -5; goto i2c_transfer_finish; 250 251 transfer_error_bus_busy: 252 PRINTD(("i2c_transfer: error: bus is busy\n")); 253 ret = -6; goto i2c_transfer_finish; 254 255 i2c_transfer_finish: 256 PRINTD(("i2c_transfer: ISR: 0x%04x\n", ISR)); 257 i2c_reset(); 258 return ret; 259 } 260 261 /* ------------------------------------------------------------------------ */ 262 /* API Functions */ 263 /* ------------------------------------------------------------------------ */ 264 void i2c_init(int speed, int slaveaddr) 265 { 266 #ifdef CONFIG_I2C_MULTI_BUS 267 base = (struct mv_i2c *)i2c_regs[current_bus]; 268 #else 269 base = (struct mv_i2c *)CONFIG_MV_I2C_REG; 270 #endif 271 272 #ifdef CONFIG_SYS_I2C_INIT_BOARD 273 u32 icr; 274 /* 275 * call board specific i2c bus reset routine before accessing the 276 * environment, which might be in a chip on that bus. For details 277 * about this problem see doc/I2C_Edge_Conditions. 278 * 279 * disable I2C controller first, otherwhise it thinks we want to 280 * talk to the slave port... 281 */ 282 icr = readl(&base->icr); 283 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); 284 285 i2c_init_board(); 286 287 writel(icr, &base->icr); 288 #endif 289 } 290 291 /* 292 * i2c_probe: - Test if a chip answers for a given i2c address 293 * 294 * @chip: address of the chip which is searched for 295 * @return: 0 if a chip was found, -1 otherwhise 296 */ 297 int i2c_probe(uchar chip) 298 { 299 struct i2c_msg msg; 300 301 i2c_reset(); 302 303 msg.condition = I2C_COND_START; 304 msg.acknack = I2C_ACKNAK_WAITACK; 305 msg.direction = I2C_WRITE; 306 msg.data = (chip << 1) + 1; 307 if (i2c_transfer(&msg)) 308 return -1; 309 310 msg.condition = I2C_COND_STOP; 311 msg.acknack = I2C_ACKNAK_SENDNAK; 312 msg.direction = I2C_READ; 313 msg.data = 0x00; 314 if (i2c_transfer(&msg)) 315 return -1; 316 317 return 0; 318 } 319 320 /* 321 * i2c_read: - Read multiple bytes from an i2c device 322 * 323 * The higher level routines take into account that this function is only 324 * called with len < page length of the device (see configuration file) 325 * 326 * @chip: address of the chip which is to be read 327 * @addr: i2c data address within the chip 328 * @alen: length of the i2c data address (1..2 bytes) 329 * @buffer: where to write the data 330 * @len: how much byte do we want to read 331 * @return: 0 in case of success 332 */ 333 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 334 { 335 struct i2c_msg msg; 336 u8 addr_bytes[3]; /* lowest...highest byte of data address */ 337 338 PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 339 "len=0x%02x)\n", chip, addr, alen, len)); 340 341 i2c_reset(); 342 343 /* dummy chip address write */ 344 PRINTD(("i2c_read: dummy chip address write\n")); 345 msg.condition = I2C_COND_START; 346 msg.acknack = I2C_ACKNAK_WAITACK; 347 msg.direction = I2C_WRITE; 348 msg.data = (chip << 1); 349 msg.data &= 0xFE; 350 if (i2c_transfer(&msg)) 351 return -1; 352 353 /* 354 * send memory address bytes; 355 * alen defines how much bytes we have to send. 356 */ 357 /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */ 358 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 359 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 360 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 361 362 while (--alen >= 0) { 363 PRINTD(("i2c_read: send memory word address byte %1d\n", alen)); 364 msg.condition = I2C_COND_NORMAL; 365 msg.acknack = I2C_ACKNAK_WAITACK; 366 msg.direction = I2C_WRITE; 367 msg.data = addr_bytes[alen]; 368 if (i2c_transfer(&msg)) 369 return -1; 370 } 371 372 /* start read sequence */ 373 PRINTD(("i2c_read: start read sequence\n")); 374 msg.condition = I2C_COND_START; 375 msg.acknack = I2C_ACKNAK_WAITACK; 376 msg.direction = I2C_WRITE; 377 msg.data = (chip << 1); 378 msg.data |= 0x01; 379 if (i2c_transfer(&msg)) 380 return -1; 381 382 /* read bytes; send NACK at last byte */ 383 while (len--) { 384 if (len == 0) { 385 msg.condition = I2C_COND_STOP; 386 msg.acknack = I2C_ACKNAK_SENDNAK; 387 } else { 388 msg.condition = I2C_COND_NORMAL; 389 msg.acknack = I2C_ACKNAK_SENDACK; 390 } 391 392 msg.direction = I2C_READ; 393 msg.data = 0x00; 394 if (i2c_transfer(&msg)) 395 return -1; 396 397 *buffer = msg.data; 398 PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n", 399 (unsigned int)buffer, *buffer)); 400 buffer++; 401 } 402 403 i2c_reset(); 404 405 return 0; 406 } 407 408 /* 409 * i2c_write: - Write multiple bytes to an i2c device 410 * 411 * The higher level routines take into account that this function is only 412 * called with len < page length of the device (see configuration file) 413 * 414 * @chip: address of the chip which is to be written 415 * @addr: i2c data address within the chip 416 * @alen: length of the i2c data address (1..2 bytes) 417 * @buffer: where to find the data to be written 418 * @len: how much byte do we want to read 419 * @return: 0 in case of success 420 */ 421 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 422 { 423 struct i2c_msg msg; 424 u8 addr_bytes[3]; /* lowest...highest byte of data address */ 425 426 PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 427 "len=0x%02x)\n", chip, addr, alen, len)); 428 429 i2c_reset(); 430 431 /* chip address write */ 432 PRINTD(("i2c_write: chip address write\n")); 433 msg.condition = I2C_COND_START; 434 msg.acknack = I2C_ACKNAK_WAITACK; 435 msg.direction = I2C_WRITE; 436 msg.data = (chip << 1); 437 msg.data &= 0xFE; 438 if (i2c_transfer(&msg)) 439 return -1; 440 441 /* 442 * send memory address bytes; 443 * alen defines how much bytes we have to send. 444 */ 445 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 446 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 447 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 448 449 while (--alen >= 0) { 450 PRINTD(("i2c_write: send memory word address\n")); 451 msg.condition = I2C_COND_NORMAL; 452 msg.acknack = I2C_ACKNAK_WAITACK; 453 msg.direction = I2C_WRITE; 454 msg.data = addr_bytes[alen]; 455 if (i2c_transfer(&msg)) 456 return -1; 457 } 458 459 /* write bytes; send NACK at last byte */ 460 while (len--) { 461 PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n", 462 (unsigned int)buffer, *buffer)); 463 464 if (len == 0) 465 msg.condition = I2C_COND_STOP; 466 else 467 msg.condition = I2C_COND_NORMAL; 468 469 msg.acknack = I2C_ACKNAK_WAITACK; 470 msg.direction = I2C_WRITE; 471 msg.data = *(buffer++); 472 473 if (i2c_transfer(&msg)) 474 return -1; 475 } 476 477 i2c_reset(); 478 479 return 0; 480 } 481 #endif /* CONFIG_HARD_I2C */ 482