1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2f8d9ca18SBeniamino Galvani /* 3f8d9ca18SBeniamino Galvani * (C) Copyright 2017 - Beniamino Galvani <b.galvani@gmail.com> 4f8d9ca18SBeniamino Galvani */ 5f8d9ca18SBeniamino Galvani #include <common.h> 6f8d9ca18SBeniamino Galvani #include <asm/arch/i2c.h> 7f8d9ca18SBeniamino Galvani #include <asm/io.h> 8f8d9ca18SBeniamino Galvani #include <dm.h> 9f8d9ca18SBeniamino Galvani #include <i2c.h> 10f8d9ca18SBeniamino Galvani 118c47ab6bSBeniamino Galvani #define I2C_TIMEOUT_MS 100 12f8d9ca18SBeniamino Galvani 13f8d9ca18SBeniamino Galvani /* Control register fields */ 14f8d9ca18SBeniamino Galvani #define REG_CTRL_START BIT(0) 15f8d9ca18SBeniamino Galvani #define REG_CTRL_ACK_IGNORE BIT(1) 16f8d9ca18SBeniamino Galvani #define REG_CTRL_STATUS BIT(2) 17f8d9ca18SBeniamino Galvani #define REG_CTRL_ERROR BIT(3) 18f8d9ca18SBeniamino Galvani #define REG_CTRL_CLKDIV_SHIFT 12 19f8d9ca18SBeniamino Galvani #define REG_CTRL_CLKDIV_MASK GENMASK(21, 12) 20f8d9ca18SBeniamino Galvani #define REG_CTRL_CLKDIVEXT_SHIFT 28 21f8d9ca18SBeniamino Galvani #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28) 22f8d9ca18SBeniamino Galvani 23f8d9ca18SBeniamino Galvani enum { 24f8d9ca18SBeniamino Galvani TOKEN_END = 0, 25f8d9ca18SBeniamino Galvani TOKEN_START, 26f8d9ca18SBeniamino Galvani TOKEN_SLAVE_ADDR_WRITE, 27f8d9ca18SBeniamino Galvani TOKEN_SLAVE_ADDR_READ, 28f8d9ca18SBeniamino Galvani TOKEN_DATA, 29f8d9ca18SBeniamino Galvani TOKEN_DATA_LAST, 30f8d9ca18SBeniamino Galvani TOKEN_STOP, 31f8d9ca18SBeniamino Galvani }; 32f8d9ca18SBeniamino Galvani 33f8d9ca18SBeniamino Galvani struct i2c_regs { 34f8d9ca18SBeniamino Galvani u32 ctrl; 35f8d9ca18SBeniamino Galvani u32 slave_addr; 36f8d9ca18SBeniamino Galvani u32 tok_list0; 37f8d9ca18SBeniamino Galvani u32 tok_list1; 38f8d9ca18SBeniamino Galvani u32 tok_wdata0; 39f8d9ca18SBeniamino Galvani u32 tok_wdata1; 40f8d9ca18SBeniamino Galvani u32 tok_rdata0; 41f8d9ca18SBeniamino Galvani u32 tok_rdata1; 42f8d9ca18SBeniamino Galvani }; 43f8d9ca18SBeniamino Galvani 44f8d9ca18SBeniamino Galvani struct meson_i2c { 45f8d9ca18SBeniamino Galvani struct i2c_regs *regs; 4650a69095SBeniamino Galvani struct i2c_msg *msg; /* Current I2C message */ 4750a69095SBeniamino Galvani bool last; /* Whether the message is the last */ 4850a69095SBeniamino Galvani uint count; /* Number of bytes in the current transfer */ 4950a69095SBeniamino Galvani uint pos; /* Position of current transfer in message */ 5050a69095SBeniamino Galvani u32 tokens[2]; /* Sequence of tokens to be written */ 5150a69095SBeniamino Galvani uint num_tokens; /* Number of tokens to be written */ 52f8d9ca18SBeniamino Galvani }; 53f8d9ca18SBeniamino Galvani 54f8d9ca18SBeniamino Galvani static void meson_i2c_reset_tokens(struct meson_i2c *i2c) 55f8d9ca18SBeniamino Galvani { 56f8d9ca18SBeniamino Galvani i2c->tokens[0] = 0; 57f8d9ca18SBeniamino Galvani i2c->tokens[1] = 0; 58f8d9ca18SBeniamino Galvani i2c->num_tokens = 0; 59f8d9ca18SBeniamino Galvani } 60f8d9ca18SBeniamino Galvani 61f8d9ca18SBeniamino Galvani static void meson_i2c_add_token(struct meson_i2c *i2c, int token) 62f8d9ca18SBeniamino Galvani { 63f8d9ca18SBeniamino Galvani if (i2c->num_tokens < 8) 64f8d9ca18SBeniamino Galvani i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4); 65f8d9ca18SBeniamino Galvani else 66f8d9ca18SBeniamino Galvani i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4); 67f8d9ca18SBeniamino Galvani 68f8d9ca18SBeniamino Galvani i2c->num_tokens++; 69f8d9ca18SBeniamino Galvani } 70f8d9ca18SBeniamino Galvani 7150a69095SBeniamino Galvani /* 7250a69095SBeniamino Galvani * Retrieve data for the current transfer (which can be at most 8 7350a69095SBeniamino Galvani * bytes) from the device internal buffer. 7450a69095SBeniamino Galvani */ 75f8d9ca18SBeniamino Galvani static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len) 76f8d9ca18SBeniamino Galvani { 77f8d9ca18SBeniamino Galvani u32 rdata0, rdata1; 78f8d9ca18SBeniamino Galvani int i; 79f8d9ca18SBeniamino Galvani 80f8d9ca18SBeniamino Galvani rdata0 = readl(&i2c->regs->tok_rdata0); 81f8d9ca18SBeniamino Galvani rdata1 = readl(&i2c->regs->tok_rdata1); 82f8d9ca18SBeniamino Galvani 83f8d9ca18SBeniamino Galvani debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len); 84f8d9ca18SBeniamino Galvani 85f8d9ca18SBeniamino Galvani for (i = 0; i < min(4, len); i++) 86f8d9ca18SBeniamino Galvani *buf++ = (rdata0 >> i * 8) & 0xff; 87f8d9ca18SBeniamino Galvani 88f8d9ca18SBeniamino Galvani for (i = 4; i < min(8, len); i++) 89f8d9ca18SBeniamino Galvani *buf++ = (rdata1 >> (i - 4) * 8) & 0xff; 90f8d9ca18SBeniamino Galvani } 91f8d9ca18SBeniamino Galvani 9250a69095SBeniamino Galvani /* 9350a69095SBeniamino Galvani * Write data for the current transfer (which can be at most 8 bytes) 9450a69095SBeniamino Galvani * to the device internal buffer. 9550a69095SBeniamino Galvani */ 96f8d9ca18SBeniamino Galvani static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len) 97f8d9ca18SBeniamino Galvani { 98f8d9ca18SBeniamino Galvani u32 wdata0 = 0, wdata1 = 0; 99f8d9ca18SBeniamino Galvani int i; 100f8d9ca18SBeniamino Galvani 101f8d9ca18SBeniamino Galvani for (i = 0; i < min(4, len); i++) 102f8d9ca18SBeniamino Galvani wdata0 |= *buf++ << (i * 8); 103f8d9ca18SBeniamino Galvani 104f8d9ca18SBeniamino Galvani for (i = 4; i < min(8, len); i++) 105f8d9ca18SBeniamino Galvani wdata1 |= *buf++ << ((i - 4) * 8); 106f8d9ca18SBeniamino Galvani 107f8d9ca18SBeniamino Galvani writel(wdata0, &i2c->regs->tok_wdata0); 108f8d9ca18SBeniamino Galvani writel(wdata1, &i2c->regs->tok_wdata1); 109f8d9ca18SBeniamino Galvani 110f8d9ca18SBeniamino Galvani debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len); 111f8d9ca18SBeniamino Galvani } 112f8d9ca18SBeniamino Galvani 11350a69095SBeniamino Galvani /* 11450a69095SBeniamino Galvani * Prepare the next transfer: pick the next 8 bytes in the remaining 11550a69095SBeniamino Galvani * part of message and write tokens and data (if needed) to the 11650a69095SBeniamino Galvani * device. 11750a69095SBeniamino Galvani */ 118f8d9ca18SBeniamino Galvani static void meson_i2c_prepare_xfer(struct meson_i2c *i2c) 119f8d9ca18SBeniamino Galvani { 120f8d9ca18SBeniamino Galvani bool write = !(i2c->msg->flags & I2C_M_RD); 121f8d9ca18SBeniamino Galvani int i; 122f8d9ca18SBeniamino Galvani 123f8d9ca18SBeniamino Galvani i2c->count = min(i2c->msg->len - i2c->pos, 8u); 124f8d9ca18SBeniamino Galvani 125f8d9ca18SBeniamino Galvani for (i = 0; i + 1 < i2c->count; i++) 126f8d9ca18SBeniamino Galvani meson_i2c_add_token(i2c, TOKEN_DATA); 127f8d9ca18SBeniamino Galvani 128f8d9ca18SBeniamino Galvani if (i2c->count) { 129f8d9ca18SBeniamino Galvani if (write || i2c->pos + i2c->count < i2c->msg->len) 130f8d9ca18SBeniamino Galvani meson_i2c_add_token(i2c, TOKEN_DATA); 131f8d9ca18SBeniamino Galvani else 132f8d9ca18SBeniamino Galvani meson_i2c_add_token(i2c, TOKEN_DATA_LAST); 133f8d9ca18SBeniamino Galvani } 134f8d9ca18SBeniamino Galvani 135f8d9ca18SBeniamino Galvani if (write) 136f8d9ca18SBeniamino Galvani meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); 137f8d9ca18SBeniamino Galvani 138f8d9ca18SBeniamino Galvani if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len) 139f8d9ca18SBeniamino Galvani meson_i2c_add_token(i2c, TOKEN_STOP); 140f8d9ca18SBeniamino Galvani 141f8d9ca18SBeniamino Galvani writel(i2c->tokens[0], &i2c->regs->tok_list0); 142f8d9ca18SBeniamino Galvani writel(i2c->tokens[1], &i2c->regs->tok_list1); 143f8d9ca18SBeniamino Galvani } 144f8d9ca18SBeniamino Galvani 145f8d9ca18SBeniamino Galvani static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg) 146f8d9ca18SBeniamino Galvani { 147f8d9ca18SBeniamino Galvani int token; 148f8d9ca18SBeniamino Galvani 149f8d9ca18SBeniamino Galvani token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ : 150f8d9ca18SBeniamino Galvani TOKEN_SLAVE_ADDR_WRITE; 151f8d9ca18SBeniamino Galvani 152f8d9ca18SBeniamino Galvani writel(msg->addr << 1, &i2c->regs->slave_addr); 153f8d9ca18SBeniamino Galvani meson_i2c_add_token(i2c, TOKEN_START); 154f8d9ca18SBeniamino Galvani meson_i2c_add_token(i2c, token); 155f8d9ca18SBeniamino Galvani } 156f8d9ca18SBeniamino Galvani 157f8d9ca18SBeniamino Galvani static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, 158f8d9ca18SBeniamino Galvani int last) 159f8d9ca18SBeniamino Galvani { 160f8d9ca18SBeniamino Galvani ulong start; 161f8d9ca18SBeniamino Galvani 162f8d9ca18SBeniamino Galvani debug("meson i2c: %s addr %u len %u\n", 163f8d9ca18SBeniamino Galvani (msg->flags & I2C_M_RD) ? "read" : "write", 164f8d9ca18SBeniamino Galvani msg->addr, msg->len); 165f8d9ca18SBeniamino Galvani 166f8d9ca18SBeniamino Galvani i2c->msg = msg; 167f8d9ca18SBeniamino Galvani i2c->last = last; 168f8d9ca18SBeniamino Galvani i2c->pos = 0; 169f8d9ca18SBeniamino Galvani i2c->count = 0; 170f8d9ca18SBeniamino Galvani 171f8d9ca18SBeniamino Galvani meson_i2c_reset_tokens(i2c); 172f8d9ca18SBeniamino Galvani meson_i2c_do_start(i2c, msg); 173f8d9ca18SBeniamino Galvani 174f8d9ca18SBeniamino Galvani do { 175f8d9ca18SBeniamino Galvani meson_i2c_prepare_xfer(i2c); 176f8d9ca18SBeniamino Galvani 177f8d9ca18SBeniamino Galvani /* start the transfer */ 178f8d9ca18SBeniamino Galvani setbits_le32(&i2c->regs->ctrl, REG_CTRL_START); 179f8d9ca18SBeniamino Galvani start = get_timer(0); 180f8d9ca18SBeniamino Galvani while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) { 181f8d9ca18SBeniamino Galvani if (get_timer(start) > I2C_TIMEOUT_MS) { 182f8d9ca18SBeniamino Galvani clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); 183f8d9ca18SBeniamino Galvani debug("meson i2c: timeout\n"); 184f8d9ca18SBeniamino Galvani return -ETIMEDOUT; 185f8d9ca18SBeniamino Galvani } 186f8d9ca18SBeniamino Galvani udelay(1); 187f8d9ca18SBeniamino Galvani } 188f8d9ca18SBeniamino Galvani meson_i2c_reset_tokens(i2c); 189f8d9ca18SBeniamino Galvani clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); 190f8d9ca18SBeniamino Galvani 191f8d9ca18SBeniamino Galvani if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) { 192f8d9ca18SBeniamino Galvani debug("meson i2c: error\n"); 193989bb924SBeniamino Galvani return -EREMOTEIO; 194f8d9ca18SBeniamino Galvani } 195f8d9ca18SBeniamino Galvani 196f8d9ca18SBeniamino Galvani if ((msg->flags & I2C_M_RD) && i2c->count) { 197f8d9ca18SBeniamino Galvani meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, 198f8d9ca18SBeniamino Galvani i2c->count); 199f8d9ca18SBeniamino Galvani } 200f8d9ca18SBeniamino Galvani i2c->pos += i2c->count; 201f8d9ca18SBeniamino Galvani } while (i2c->pos < msg->len); 202f8d9ca18SBeniamino Galvani 203f8d9ca18SBeniamino Galvani return 0; 204f8d9ca18SBeniamino Galvani } 205f8d9ca18SBeniamino Galvani 206f8d9ca18SBeniamino Galvani static int meson_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, 207f8d9ca18SBeniamino Galvani int nmsgs) 208f8d9ca18SBeniamino Galvani { 209f8d9ca18SBeniamino Galvani struct meson_i2c *i2c = dev_get_priv(bus); 210f8d9ca18SBeniamino Galvani int i, ret = 0; 211f8d9ca18SBeniamino Galvani 212f8d9ca18SBeniamino Galvani for (i = 0; i < nmsgs; i++) { 213f8d9ca18SBeniamino Galvani ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1); 214f8d9ca18SBeniamino Galvani if (ret) 215989bb924SBeniamino Galvani return ret; 216f8d9ca18SBeniamino Galvani } 217f8d9ca18SBeniamino Galvani 218f8d9ca18SBeniamino Galvani return 0; 219f8d9ca18SBeniamino Galvani } 220f8d9ca18SBeniamino Galvani 221f8d9ca18SBeniamino Galvani static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) 222f8d9ca18SBeniamino Galvani { 223f8d9ca18SBeniamino Galvani struct meson_i2c *i2c = dev_get_priv(bus); 224f8d9ca18SBeniamino Galvani unsigned int clk_rate = MESON_I2C_CLK_RATE; 225f8d9ca18SBeniamino Galvani unsigned int div; 226f8d9ca18SBeniamino Galvani 227f8d9ca18SBeniamino Galvani div = DIV_ROUND_UP(clk_rate, speed * 4); 228f8d9ca18SBeniamino Galvani 229f8d9ca18SBeniamino Galvani /* clock divider has 12 bits */ 230f8d9ca18SBeniamino Galvani if (div >= (1 << 12)) { 231f8d9ca18SBeniamino Galvani debug("meson i2c: requested bus frequency too low\n"); 232f8d9ca18SBeniamino Galvani div = (1 << 12) - 1; 233f8d9ca18SBeniamino Galvani } 234f8d9ca18SBeniamino Galvani 235f8d9ca18SBeniamino Galvani clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIV_MASK, 236f8d9ca18SBeniamino Galvani (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); 237f8d9ca18SBeniamino Galvani 238f8d9ca18SBeniamino Galvani clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK, 239f8d9ca18SBeniamino Galvani (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); 240f8d9ca18SBeniamino Galvani 241f8d9ca18SBeniamino Galvani debug("meson i2c: set clk %u, src %u, div %u\n", speed, clk_rate, div); 242f8d9ca18SBeniamino Galvani 243f8d9ca18SBeniamino Galvani return 0; 244f8d9ca18SBeniamino Galvani } 245f8d9ca18SBeniamino Galvani 246f8d9ca18SBeniamino Galvani static int meson_i2c_probe(struct udevice *bus) 247f8d9ca18SBeniamino Galvani { 248f8d9ca18SBeniamino Galvani struct meson_i2c *i2c = dev_get_priv(bus); 249f8d9ca18SBeniamino Galvani 250f8d9ca18SBeniamino Galvani i2c->regs = dev_read_addr_ptr(bus); 251f8d9ca18SBeniamino Galvani clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); 252f8d9ca18SBeniamino Galvani 253f8d9ca18SBeniamino Galvani return 0; 254f8d9ca18SBeniamino Galvani } 255f8d9ca18SBeniamino Galvani 256f8d9ca18SBeniamino Galvani static const struct dm_i2c_ops meson_i2c_ops = { 257f8d9ca18SBeniamino Galvani .xfer = meson_i2c_xfer, 258f8d9ca18SBeniamino Galvani .set_bus_speed = meson_i2c_set_bus_speed, 259f8d9ca18SBeniamino Galvani }; 260f8d9ca18SBeniamino Galvani 261f8d9ca18SBeniamino Galvani static const struct udevice_id meson_i2c_ids[] = { 262f8d9ca18SBeniamino Galvani { .compatible = "amlogic,meson6-i2c" }, 263f8d9ca18SBeniamino Galvani { .compatible = "amlogic,meson-gx-i2c" }, 264f8d9ca18SBeniamino Galvani { .compatible = "amlogic,meson-gxbb-i2c" }, 265f8d9ca18SBeniamino Galvani { } 266f8d9ca18SBeniamino Galvani }; 267f8d9ca18SBeniamino Galvani 268f8d9ca18SBeniamino Galvani U_BOOT_DRIVER(i2c_meson) = { 269f8d9ca18SBeniamino Galvani .name = "i2c_meson", 270f8d9ca18SBeniamino Galvani .id = UCLASS_I2C, 271f8d9ca18SBeniamino Galvani .of_match = meson_i2c_ids, 272f8d9ca18SBeniamino Galvani .probe = meson_i2c_probe, 273f8d9ca18SBeniamino Galvani .priv_auto_alloc_size = sizeof(struct meson_i2c), 274f8d9ca18SBeniamino Galvani .ops = &meson_i2c_ops, 275f8d9ca18SBeniamino Galvani }; 276