1 /* 2 * Copyright (C) 2014 Panasonic Corporation 3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <linux/types.h> 10 #include <asm/io.h> 11 #include <asm/errno.h> 12 #include <dm/device.h> 13 #include <dm/root.h> 14 #include <i2c.h> 15 #include <fdtdec.h> 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 struct uniphier_i2c_regs { 20 u32 dtrm; /* data transmission */ 21 #define I2C_DTRM_STA (1 << 10) 22 #define I2C_DTRM_STO (1 << 9) 23 #define I2C_DTRM_NACK (1 << 8) 24 #define I2C_DTRM_RD (1 << 0) 25 u32 drec; /* data reception */ 26 #define I2C_DREC_STS (1 << 12) 27 #define I2C_DREC_LRB (1 << 11) 28 #define I2C_DREC_LAB (1 << 9) 29 u32 myad; /* slave address */ 30 u32 clk; /* clock frequency control */ 31 u32 brst; /* bus reset */ 32 #define I2C_BRST_FOEN (1 << 1) 33 #define I2C_BRST_BRST (1 << 0) 34 u32 hold; /* hold time control */ 35 u32 bsts; /* bus status monitor */ 36 u32 noise; /* noise filter control */ 37 u32 setup; /* setup time control */ 38 }; 39 40 #define IOBUS_FREQ 100000000 41 42 struct uniphier_i2c_dev { 43 struct uniphier_i2c_regs __iomem *regs; /* register base */ 44 unsigned long input_clk; /* master clock (Hz) */ 45 unsigned long wait_us; /* wait for every byte transfer (us) */ 46 }; 47 48 static int uniphier_i2c_probe(struct udevice *dev) 49 { 50 fdt_addr_t addr; 51 fdt_size_t size; 52 struct uniphier_i2c_dev *priv = dev_get_priv(dev); 53 54 addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size); 55 56 priv->regs = map_sysmem(addr, size); 57 58 if (!priv->regs) 59 return -ENOMEM; 60 61 priv->input_clk = IOBUS_FREQ; 62 63 /* deassert reset */ 64 writel(0x3, &priv->regs->brst); 65 66 return 0; 67 } 68 69 static int uniphier_i2c_remove(struct udevice *dev) 70 { 71 struct uniphier_i2c_dev *priv = dev_get_priv(dev); 72 73 unmap_sysmem(priv->regs); 74 75 return 0; 76 } 77 78 static int uniphier_i2c_child_pre_probe(struct udevice *dev) 79 { 80 struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev); 81 82 if (dev->of_offset == -1) 83 return 0; 84 return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, 85 i2c_chip); 86 } 87 88 static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm) 89 { 90 writel(dtrm, &dev->regs->dtrm); 91 92 /* 93 * This controller only provides interruption to inform the completion 94 * of each byte transfer. (No status register to poll it.) 95 * Unfortunately, U-Boot does not have a good support of interrupt. 96 * Wait for a while. 97 */ 98 udelay(dev->wait_us); 99 100 return readl(&dev->regs->drec); 101 } 102 103 static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop) 104 { 105 int ret = 0; 106 u32 drec; 107 108 drec = send_and_recv_byte(dev, dtrm); 109 110 if (drec & I2C_DREC_LAB) { 111 debug("uniphier_i2c: bus arbitration failed\n"); 112 *stop = false; 113 ret = -EREMOTEIO; 114 } 115 if (drec & I2C_DREC_LRB) { 116 debug("uniphier_i2c: slave did not return ACK\n"); 117 ret = -EREMOTEIO; 118 } 119 return ret; 120 } 121 122 static int uniphier_i2c_transmit(struct uniphier_i2c_dev *dev, uint addr, 123 uint len, const u8 *buf, bool *stop) 124 { 125 int ret; 126 127 debug("%s: addr = %x, len = %d\n", __func__, addr, len); 128 129 ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop); 130 if (ret < 0) 131 goto fail; 132 133 while (len--) { 134 ret = send_byte(dev, I2C_DTRM_NACK | *buf++, stop); 135 if (ret < 0) 136 goto fail; 137 } 138 139 fail: 140 if (*stop) 141 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm); 142 143 return ret; 144 } 145 146 static int uniphier_i2c_receive(struct uniphier_i2c_dev *dev, uint addr, 147 uint len, u8 *buf, bool *stop) 148 { 149 int ret; 150 151 debug("%s: addr = %x, len = %d\n", __func__, addr, len); 152 153 ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | 154 I2C_DTRM_RD | addr << 1, stop); 155 if (ret < 0) 156 goto fail; 157 158 while (len--) 159 *buf++ = send_and_recv_byte(dev, len ? 0 : I2C_DTRM_NACK); 160 161 fail: 162 if (*stop) 163 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm); 164 165 return ret; 166 } 167 168 static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, 169 int nmsgs) 170 { 171 int ret = 0; 172 struct uniphier_i2c_dev *dev = dev_get_priv(bus); 173 bool stop; 174 175 for (; nmsgs > 0; nmsgs--, msg++) { 176 /* If next message is read, skip the stop condition */ 177 stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true; 178 179 if (msg->flags & I2C_M_RD) 180 ret = uniphier_i2c_receive(dev, msg->addr, msg->len, 181 msg->buf, &stop); 182 else 183 ret = uniphier_i2c_transmit(dev, msg->addr, msg->len, 184 msg->buf, &stop); 185 186 if (ret < 0) 187 break; 188 } 189 190 return ret; 191 } 192 193 static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) 194 { 195 struct uniphier_i2c_dev *priv = dev_get_priv(bus); 196 197 /* max supported frequency is 400 kHz */ 198 if (speed > 400000) 199 return -EINVAL; 200 201 /* bus reset: make sure the bus is idle when change the frequency */ 202 writel(0x1, &priv->regs->brst); 203 204 writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed), 205 &priv->regs->clk); 206 207 writel(0x3, &priv->regs->brst); 208 209 /* 210 * Theoretically, each byte can be transferred in 211 * 1000000 * 9 / speed usec. For safety, wait more than double. 212 */ 213 priv->wait_us = 20000000 / speed; 214 215 return 0; 216 } 217 218 219 static const struct dm_i2c_ops uniphier_i2c_ops = { 220 .xfer = uniphier_i2c_xfer, 221 .set_bus_speed = uniphier_i2c_set_bus_speed, 222 }; 223 224 static const struct udevice_id uniphier_i2c_of_match[] = { 225 { .compatible = "panasonic,uniphier-i2c" }, 226 {}, 227 }; 228 229 U_BOOT_DRIVER(uniphier_i2c) = { 230 .name = "uniphier-i2c", 231 .id = UCLASS_I2C, 232 .of_match = uniphier_i2c_of_match, 233 .probe = uniphier_i2c_probe, 234 .remove = uniphier_i2c_remove, 235 .per_child_auto_alloc_size = sizeof(struct dm_i2c_chip), 236 .child_pre_probe = uniphier_i2c_child_pre_probe, 237 .priv_auto_alloc_size = sizeof(struct uniphier_i2c_dev), 238 .ops = &uniphier_i2c_ops, 239 }; 240