1 /* 2 * Copyright (c) 2014 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <errno.h> 10 #include <fdtdec.h> 11 #include <i2c.h> 12 #include <malloc.h> 13 #include <dm/device-internal.h> 14 #include <dm/lists.h> 15 #include <dm/root.h> 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 #define I2C_MAX_OFFSET_LEN 4 20 21 /** 22 * i2c_setup_offset() - Set up a new message with a chip offset 23 * 24 * @chip: Chip to use 25 * @offset: Byte offset within chip 26 * @offset_buf: Place to put byte offset 27 * @msg: Message buffer 28 * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the 29 * message is still set up but will not contain an offset. 30 */ 31 static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset, 32 uint8_t offset_buf[], struct i2c_msg *msg) 33 { 34 int offset_len; 35 36 msg->addr = chip->chip_addr; 37 msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; 38 msg->len = chip->offset_len; 39 msg->buf = offset_buf; 40 if (!chip->offset_len) 41 return -EADDRNOTAVAIL; 42 assert(chip->offset_len <= I2C_MAX_OFFSET_LEN); 43 offset_len = chip->offset_len; 44 while (offset_len--) 45 *offset_buf++ = offset >> (8 * offset_len); 46 47 return 0; 48 } 49 50 static int i2c_read_bytewise(struct udevice *dev, uint offset, 51 uint8_t *buffer, int len) 52 { 53 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 54 struct udevice *bus = dev_get_parent(dev); 55 struct dm_i2c_ops *ops = i2c_get_ops(bus); 56 struct i2c_msg msg[2], *ptr; 57 uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; 58 int ret; 59 int i; 60 61 for (i = 0; i < len; i++) { 62 if (i2c_setup_offset(chip, offset + i, offset_buf, msg)) 63 return -EINVAL; 64 ptr = msg + 1; 65 ptr->addr = chip->chip_addr; 66 ptr->flags = msg->flags | I2C_M_RD; 67 ptr->len = 1; 68 ptr->buf = &buffer[i]; 69 ptr++; 70 71 ret = ops->xfer(bus, msg, ptr - msg); 72 if (ret) 73 return ret; 74 } 75 76 return 0; 77 } 78 79 static int i2c_write_bytewise(struct udevice *dev, uint offset, 80 const uint8_t *buffer, int len) 81 { 82 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 83 struct udevice *bus = dev_get_parent(dev); 84 struct dm_i2c_ops *ops = i2c_get_ops(bus); 85 struct i2c_msg msg[1]; 86 uint8_t buf[I2C_MAX_OFFSET_LEN + 1]; 87 int ret; 88 int i; 89 90 for (i = 0; i < len; i++) { 91 if (i2c_setup_offset(chip, offset + i, buf, msg)) 92 return -EINVAL; 93 buf[msg->len++] = buffer[i]; 94 95 ret = ops->xfer(bus, msg, 1); 96 if (ret) 97 return ret; 98 } 99 100 return 0; 101 } 102 103 int i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len) 104 { 105 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 106 struct udevice *bus = dev_get_parent(dev); 107 struct dm_i2c_ops *ops = i2c_get_ops(bus); 108 struct i2c_msg msg[2], *ptr; 109 uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; 110 int msg_count; 111 112 if (!ops->xfer) 113 return -ENOSYS; 114 if (chip->flags & DM_I2C_CHIP_RD_ADDRESS) 115 return i2c_read_bytewise(dev, offset, buffer, len); 116 ptr = msg; 117 if (!i2c_setup_offset(chip, offset, offset_buf, ptr)) 118 ptr++; 119 120 if (len) { 121 ptr->addr = chip->chip_addr; 122 ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; 123 ptr->flags |= I2C_M_RD; 124 ptr->len = len; 125 ptr->buf = buffer; 126 ptr++; 127 } 128 msg_count = ptr - msg; 129 130 return ops->xfer(bus, msg, msg_count); 131 } 132 133 int i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, int len) 134 { 135 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 136 struct udevice *bus = dev_get_parent(dev); 137 struct dm_i2c_ops *ops = i2c_get_ops(bus); 138 struct i2c_msg msg[1]; 139 140 if (!ops->xfer) 141 return -ENOSYS; 142 143 if (chip->flags & DM_I2C_CHIP_WR_ADDRESS) 144 return i2c_write_bytewise(dev, offset, buffer, len); 145 /* 146 * The simple approach would be to send two messages here: one to 147 * set the offset and one to write the bytes. However some drivers 148 * will not be expecting this, and some chips won't like how the 149 * driver presents this on the I2C bus. 150 * 151 * The API does not support separate offset and data. We could extend 152 * it with a flag indicating that there is data in the next message 153 * that needs to be processed in the same transaction. We could 154 * instead add an additional buffer to each message. For now, handle 155 * this in the uclass since it isn't clear what the impact on drivers 156 * would be with this extra complication. Unfortunately this means 157 * copying the message. 158 * 159 * Use the stack for small messages, malloc() for larger ones. We 160 * need to allow space for the offset (up to 4 bytes) and the message 161 * itself. 162 */ 163 if (len < 64) { 164 uint8_t buf[I2C_MAX_OFFSET_LEN + len]; 165 166 i2c_setup_offset(chip, offset, buf, msg); 167 msg->len += len; 168 memcpy(buf + chip->offset_len, buffer, len); 169 170 return ops->xfer(bus, msg, 1); 171 } else { 172 uint8_t *buf; 173 int ret; 174 175 buf = malloc(I2C_MAX_OFFSET_LEN + len); 176 if (!buf) 177 return -ENOMEM; 178 i2c_setup_offset(chip, offset, buf, msg); 179 msg->len += len; 180 memcpy(buf + chip->offset_len, buffer, len); 181 182 ret = ops->xfer(bus, msg, 1); 183 free(buf); 184 return ret; 185 } 186 } 187 188 /** 189 * i2c_probe_chip() - probe for a chip on a bus 190 * 191 * @bus: Bus to probe 192 * @chip_addr: Chip address to probe 193 * @flags: Flags for the chip 194 * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip 195 * does not respond to probe 196 */ 197 static int i2c_probe_chip(struct udevice *bus, uint chip_addr, 198 enum dm_i2c_chip_flags chip_flags) 199 { 200 struct dm_i2c_ops *ops = i2c_get_ops(bus); 201 struct i2c_msg msg[1]; 202 int ret; 203 204 if (ops->probe_chip) { 205 ret = ops->probe_chip(bus, chip_addr, chip_flags); 206 if (!ret || ret != -ENOSYS) 207 return ret; 208 } 209 210 if (!ops->xfer) 211 return -ENOSYS; 212 213 /* Probe with a zero-length message */ 214 msg->addr = chip_addr; 215 msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; 216 msg->len = 0; 217 msg->buf = NULL; 218 219 return ops->xfer(bus, msg, 1); 220 } 221 222 static int i2c_bind_driver(struct udevice *bus, uint chip_addr, 223 struct udevice **devp) 224 { 225 struct dm_i2c_chip chip; 226 char name[30], *str; 227 struct udevice *dev; 228 int ret; 229 230 snprintf(name, sizeof(name), "generic_%x", chip_addr); 231 str = strdup(name); 232 ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev); 233 debug("%s: device_bind_driver: ret=%d\n", __func__, ret); 234 if (ret) 235 goto err_bind; 236 237 /* Tell the device what we know about it */ 238 memset(&chip, '\0', sizeof(chip)); 239 chip.chip_addr = chip_addr; 240 chip.offset_len = 1; /* we assume */ 241 ret = device_probe_child(dev, &chip); 242 debug("%s: device_probe_child: ret=%d\n", __func__, ret); 243 if (ret) 244 goto err_probe; 245 246 *devp = dev; 247 return 0; 248 249 err_probe: 250 device_unbind(dev); 251 err_bind: 252 free(str); 253 return ret; 254 } 255 256 int i2c_get_chip(struct udevice *bus, uint chip_addr, struct udevice **devp) 257 { 258 struct udevice *dev; 259 260 debug("%s: Searching bus '%s' for address %02x: ", __func__, 261 bus->name, chip_addr); 262 for (device_find_first_child(bus, &dev); dev; 263 device_find_next_child(&dev)) { 264 struct dm_i2c_chip store; 265 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 266 int ret; 267 268 if (!chip) { 269 chip = &store; 270 i2c_chip_ofdata_to_platdata(gd->fdt_blob, 271 dev->of_offset, chip); 272 } 273 if (chip->chip_addr == chip_addr) { 274 ret = device_probe(dev); 275 debug("found, ret=%d\n", ret); 276 if (ret) 277 return ret; 278 *devp = dev; 279 return 0; 280 } 281 } 282 debug("not found\n"); 283 return i2c_bind_driver(bus, chip_addr, devp); 284 } 285 286 int i2c_get_chip_for_busnum(int busnum, int chip_addr, struct udevice **devp) 287 { 288 struct udevice *bus; 289 int ret; 290 291 ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); 292 if (ret) { 293 debug("Cannot find I2C bus %d\n", busnum); 294 return ret; 295 } 296 ret = i2c_get_chip(bus, chip_addr, devp); 297 if (ret) { 298 debug("Cannot find I2C chip %02x on bus %d\n", chip_addr, 299 busnum); 300 return ret; 301 } 302 303 return 0; 304 } 305 306 int i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 307 struct udevice **devp) 308 { 309 int ret; 310 311 *devp = NULL; 312 313 /* First probe that chip */ 314 ret = i2c_probe_chip(bus, chip_addr, chip_flags); 315 debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, 316 chip_addr, ret); 317 if (ret) 318 return ret; 319 320 /* The chip was found, see if we have a driver, and probe it */ 321 ret = i2c_get_chip(bus, chip_addr, devp); 322 debug("%s: i2c_get_chip: ret=%d\n", __func__, ret); 323 324 return ret; 325 } 326 327 int i2c_set_bus_speed(struct udevice *bus, unsigned int speed) 328 { 329 struct dm_i2c_ops *ops = i2c_get_ops(bus); 330 struct dm_i2c_bus *i2c = bus->uclass_priv; 331 int ret; 332 333 /* 334 * If we have a method, call it. If not then the driver probably wants 335 * to deal with speed changes on the next transfer. It can easily read 336 * the current speed from this uclass 337 */ 338 if (ops->set_bus_speed) { 339 ret = ops->set_bus_speed(bus, speed); 340 if (ret) 341 return ret; 342 } 343 i2c->speed_hz = speed; 344 345 return 0; 346 } 347 348 /* 349 * i2c_get_bus_speed: 350 * 351 * Returns speed of selected I2C bus in Hz 352 */ 353 int i2c_get_bus_speed(struct udevice *bus) 354 { 355 struct dm_i2c_ops *ops = i2c_get_ops(bus); 356 struct dm_i2c_bus *i2c = bus->uclass_priv; 357 358 if (!ops->get_bus_speed) 359 return i2c->speed_hz; 360 361 return ops->get_bus_speed(bus); 362 } 363 364 int i2c_set_chip_flags(struct udevice *dev, uint flags) 365 { 366 struct udevice *bus = dev->parent; 367 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 368 struct dm_i2c_ops *ops = i2c_get_ops(bus); 369 int ret; 370 371 if (ops->set_flags) { 372 ret = ops->set_flags(dev, flags); 373 if (ret) 374 return ret; 375 } 376 chip->flags = flags; 377 378 return 0; 379 } 380 381 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp) 382 { 383 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 384 385 *flagsp = chip->flags; 386 387 return 0; 388 } 389 390 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len) 391 { 392 struct dm_i2c_chip *chip = dev_get_parentdata(dev); 393 394 if (offset_len > I2C_MAX_OFFSET_LEN) 395 return -EINVAL; 396 chip->offset_len = offset_len; 397 398 return 0; 399 } 400 401 int i2c_deblock(struct udevice *bus) 402 { 403 struct dm_i2c_ops *ops = i2c_get_ops(bus); 404 405 /* 406 * We could implement a software deblocking here if we could get 407 * access to the GPIOs used by I2C, and switch them to GPIO mode 408 * and then back to I2C. This is somewhat beyond our powers in 409 * driver model at present, so for now just fail. 410 * 411 * See https://patchwork.ozlabs.org/patch/399040/ 412 */ 413 if (!ops->deblock) 414 return -ENOSYS; 415 416 return ops->deblock(bus); 417 } 418 419 int i2c_chip_ofdata_to_platdata(const void *blob, int node, 420 struct dm_i2c_chip *chip) 421 { 422 chip->offset_len = 1; /* default */ 423 chip->flags = 0; 424 chip->chip_addr = fdtdec_get_int(gd->fdt_blob, node, "reg", -1); 425 if (chip->chip_addr == -1) { 426 debug("%s: I2C Node '%s' has no 'reg' property\n", __func__, 427 fdt_get_name(blob, node, NULL)); 428 return -EINVAL; 429 } 430 431 return 0; 432 } 433 434 static int i2c_post_probe(struct udevice *dev) 435 { 436 struct dm_i2c_bus *i2c = dev->uclass_priv; 437 438 i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset, 439 "clock-frequency", 100000); 440 441 return i2c_set_bus_speed(dev, i2c->speed_hz); 442 } 443 444 int i2c_post_bind(struct udevice *dev) 445 { 446 /* Scan the bus for devices */ 447 return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); 448 } 449 450 UCLASS_DRIVER(i2c) = { 451 .id = UCLASS_I2C, 452 .name = "i2c", 453 .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus), 454 .post_bind = i2c_post_bind, 455 .post_probe = i2c_post_probe, 456 }; 457 458 UCLASS_DRIVER(i2c_generic) = { 459 .id = UCLASS_I2C_GENERIC, 460 .name = "i2c_generic", 461 }; 462 463 U_BOOT_DRIVER(i2c_generic_chip_drv) = { 464 .name = "i2c_generic_chip_drv", 465 .id = UCLASS_I2C_GENERIC, 466 }; 467