1031ed2faSVipin KUMAR /* 2031ed2faSVipin KUMAR * (C) Copyright 2009 3031ed2faSVipin KUMAR * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. 4031ed2faSVipin KUMAR * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6031ed2faSVipin KUMAR */ 7031ed2faSVipin KUMAR 8031ed2faSVipin KUMAR #ifndef __DW_I2C_H_ 9031ed2faSVipin KUMAR #define __DW_I2C_H_ 10031ed2faSVipin KUMAR 11031ed2faSVipin KUMAR struct i2c_regs { 12*e209828cSStefan Roese u32 ic_con; /* 0x00 */ 13*e209828cSStefan Roese u32 ic_tar; /* 0x04 */ 14*e209828cSStefan Roese u32 ic_sar; /* 0x08 */ 15*e209828cSStefan Roese u32 ic_hs_maddr; /* 0x0c */ 16*e209828cSStefan Roese u32 ic_cmd_data; /* 0x10 */ 17*e209828cSStefan Roese u32 ic_ss_scl_hcnt; /* 0x14 */ 18*e209828cSStefan Roese u32 ic_ss_scl_lcnt; /* 0x18 */ 19*e209828cSStefan Roese u32 ic_fs_scl_hcnt; /* 0x1c */ 20*e209828cSStefan Roese u32 ic_fs_scl_lcnt; /* 0x20 */ 21*e209828cSStefan Roese u32 ic_hs_scl_hcnt; /* 0x24 */ 22*e209828cSStefan Roese u32 ic_hs_scl_lcnt; /* 0x28 */ 23*e209828cSStefan Roese u32 ic_intr_stat; /* 0x2c */ 24*e209828cSStefan Roese u32 ic_intr_mask; /* 0x30 */ 25*e209828cSStefan Roese u32 ic_raw_intr_stat; /* 0x34 */ 26*e209828cSStefan Roese u32 ic_rx_tl; /* 0x38 */ 27*e209828cSStefan Roese u32 ic_tx_tl; /* 0x3c */ 28*e209828cSStefan Roese u32 ic_clr_intr; /* 0x40 */ 29*e209828cSStefan Roese u32 ic_clr_rx_under; /* 0x44 */ 30*e209828cSStefan Roese u32 ic_clr_rx_over; /* 0x48 */ 31*e209828cSStefan Roese u32 ic_clr_tx_over; /* 0x4c */ 32*e209828cSStefan Roese u32 ic_clr_rd_req; /* 0x50 */ 33*e209828cSStefan Roese u32 ic_clr_tx_abrt; /* 0x54 */ 34*e209828cSStefan Roese u32 ic_clr_rx_done; /* 0x58 */ 35*e209828cSStefan Roese u32 ic_clr_activity; /* 0x5c */ 36*e209828cSStefan Roese u32 ic_clr_stop_det; /* 0x60 */ 37*e209828cSStefan Roese u32 ic_clr_start_det; /* 0x64 */ 38*e209828cSStefan Roese u32 ic_clr_gen_call; /* 0x68 */ 39*e209828cSStefan Roese u32 ic_enable; /* 0x6c */ 40*e209828cSStefan Roese u32 ic_status; /* 0x70 */ 41*e209828cSStefan Roese u32 ic_txflr; /* 0x74 */ 42*e209828cSStefan Roese u32 ic_rxflr; /* 0x78 */ 43*e209828cSStefan Roese u32 ic_sda_hold; /* 0x7c */ 44*e209828cSStefan Roese u32 ic_tx_abrt_source; /* 0x80 */ 45*e209828cSStefan Roese u8 res1[0x18]; /* 0x84 */ 46*e209828cSStefan Roese u32 ic_enable_status; /* 0x9c */ 47031ed2faSVipin KUMAR }; 48031ed2faSVipin KUMAR 49d40d914cSArmando Visconti #if !defined(IC_CLK) 50031ed2faSVipin KUMAR #define IC_CLK 166 51d40d914cSArmando Visconti #endif 52031ed2faSVipin KUMAR #define NANO_TO_MICRO 1000 53031ed2faSVipin KUMAR 54031ed2faSVipin KUMAR /* High and low times in different speed modes (in ns) */ 55031ed2faSVipin KUMAR #define MIN_SS_SCL_HIGHTIME 4000 56ea31b7a7SArmando Visconti #define MIN_SS_SCL_LOWTIME 4700 57ea31b7a7SArmando Visconti #define MIN_FS_SCL_HIGHTIME 600 58ea31b7a7SArmando Visconti #define MIN_FS_SCL_LOWTIME 1300 59031ed2faSVipin KUMAR #define MIN_HS_SCL_HIGHTIME 60 60031ed2faSVipin KUMAR #define MIN_HS_SCL_LOWTIME 160 61031ed2faSVipin KUMAR 62031ed2faSVipin KUMAR /* Worst case timeout for 1 byte is kept as 2ms */ 63031ed2faSVipin KUMAR #define I2C_BYTE_TO (CONFIG_SYS_HZ/500) 64031ed2faSVipin KUMAR #define I2C_STOPDET_TO (CONFIG_SYS_HZ/500) 65031ed2faSVipin KUMAR #define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16) 66031ed2faSVipin KUMAR 67031ed2faSVipin KUMAR /* i2c control register definitions */ 68031ed2faSVipin KUMAR #define IC_CON_SD 0x0040 69031ed2faSVipin KUMAR #define IC_CON_RE 0x0020 70031ed2faSVipin KUMAR #define IC_CON_10BITADDRMASTER 0x0010 71031ed2faSVipin KUMAR #define IC_CON_10BITADDR_SLAVE 0x0008 72031ed2faSVipin KUMAR #define IC_CON_SPD_MSK 0x0006 73031ed2faSVipin KUMAR #define IC_CON_SPD_SS 0x0002 74031ed2faSVipin KUMAR #define IC_CON_SPD_FS 0x0004 75031ed2faSVipin KUMAR #define IC_CON_SPD_HS 0x0006 76031ed2faSVipin KUMAR #define IC_CON_MM 0x0001 77031ed2faSVipin KUMAR 78031ed2faSVipin KUMAR /* i2c target address register definitions */ 79031ed2faSVipin KUMAR #define TAR_ADDR 0x0050 80031ed2faSVipin KUMAR 81031ed2faSVipin KUMAR /* i2c slave address register definitions */ 82031ed2faSVipin KUMAR #define IC_SLAVE_ADDR 0x0002 83031ed2faSVipin KUMAR 84031ed2faSVipin KUMAR /* i2c data buffer and command register definitions */ 85031ed2faSVipin KUMAR #define IC_CMD 0x0100 86491739bbSArmando Visconti #define IC_STOP 0x0200 87031ed2faSVipin KUMAR 88031ed2faSVipin KUMAR /* i2c interrupt status register definitions */ 89031ed2faSVipin KUMAR #define IC_GEN_CALL 0x0800 90031ed2faSVipin KUMAR #define IC_START_DET 0x0400 91031ed2faSVipin KUMAR #define IC_STOP_DET 0x0200 92031ed2faSVipin KUMAR #define IC_ACTIVITY 0x0100 93031ed2faSVipin KUMAR #define IC_RX_DONE 0x0080 94031ed2faSVipin KUMAR #define IC_TX_ABRT 0x0040 95031ed2faSVipin KUMAR #define IC_RD_REQ 0x0020 96031ed2faSVipin KUMAR #define IC_TX_EMPTY 0x0010 97031ed2faSVipin KUMAR #define IC_TX_OVER 0x0008 98031ed2faSVipin KUMAR #define IC_RX_FULL 0x0004 99031ed2faSVipin KUMAR #define IC_RX_OVER 0x0002 100031ed2faSVipin KUMAR #define IC_RX_UNDER 0x0001 101031ed2faSVipin KUMAR 102031ed2faSVipin KUMAR /* fifo threshold register definitions */ 103031ed2faSVipin KUMAR #define IC_TL0 0x00 104031ed2faSVipin KUMAR #define IC_TL1 0x01 105031ed2faSVipin KUMAR #define IC_TL2 0x02 106031ed2faSVipin KUMAR #define IC_TL3 0x03 107031ed2faSVipin KUMAR #define IC_TL4 0x04 108031ed2faSVipin KUMAR #define IC_TL5 0x05 109031ed2faSVipin KUMAR #define IC_TL6 0x06 110031ed2faSVipin KUMAR #define IC_TL7 0x07 111031ed2faSVipin KUMAR #define IC_RX_TL IC_TL0 112031ed2faSVipin KUMAR #define IC_TX_TL IC_TL0 113031ed2faSVipin KUMAR 114031ed2faSVipin KUMAR /* i2c enable register definitions */ 115031ed2faSVipin KUMAR #define IC_ENABLE_0B 0x0001 116031ed2faSVipin KUMAR 117031ed2faSVipin KUMAR /* i2c status register definitions */ 118031ed2faSVipin KUMAR #define IC_STATUS_SA 0x0040 119031ed2faSVipin KUMAR #define IC_STATUS_MA 0x0020 120031ed2faSVipin KUMAR #define IC_STATUS_RFF 0x0010 121031ed2faSVipin KUMAR #define IC_STATUS_RFNE 0x0008 122031ed2faSVipin KUMAR #define IC_STATUS_TFE 0x0004 123031ed2faSVipin KUMAR #define IC_STATUS_TFNF 0x0002 124031ed2faSVipin KUMAR #define IC_STATUS_ACT 0x0001 125031ed2faSVipin KUMAR 126031ed2faSVipin KUMAR /* Speed Selection */ 127031ed2faSVipin KUMAR #define IC_SPEED_MODE_STANDARD 1 128031ed2faSVipin KUMAR #define IC_SPEED_MODE_FAST 2 129031ed2faSVipin KUMAR #define IC_SPEED_MODE_MAX 3 130031ed2faSVipin KUMAR 131031ed2faSVipin KUMAR #define I2C_MAX_SPEED 3400000 132031ed2faSVipin KUMAR #define I2C_FAST_SPEED 400000 133031ed2faSVipin KUMAR #define I2C_STANDARD_SPEED 100000 134031ed2faSVipin KUMAR 135031ed2faSVipin KUMAR #endif /* __DW_I2C_H_ */ 136