1 /* 2 * (C) Copyright 2009 3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <asm/io.h> 10 #include <asm/arch/hardware.h> 11 #include "designware_i2c.h" 12 13 #ifdef CONFIG_I2C_MULTI_BUS 14 static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX]; 15 static unsigned int current_bus = 0; 16 #endif 17 18 static struct i2c_regs *i2c_regs_p = 19 (struct i2c_regs *)CONFIG_SYS_I2C_BASE; 20 21 /* 22 * set_speed - Set the i2c speed mode (standard, high, fast) 23 * @i2c_spd: required i2c speed mode 24 * 25 * Set the i2c speed mode (standard, high, fast) 26 */ 27 static void set_speed(int i2c_spd) 28 { 29 unsigned int cntl; 30 unsigned int hcnt, lcnt; 31 unsigned int enbl; 32 33 /* to set speed cltr must be disabled */ 34 enbl = readl(&i2c_regs_p->ic_enable); 35 enbl &= ~IC_ENABLE_0B; 36 writel(enbl, &i2c_regs_p->ic_enable); 37 38 cntl = (readl(&i2c_regs_p->ic_con) & (~IC_CON_SPD_MSK)); 39 40 switch (i2c_spd) { 41 case IC_SPEED_MODE_MAX: 42 cntl |= IC_CON_SPD_HS; 43 hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO; 44 writel(hcnt, &i2c_regs_p->ic_hs_scl_hcnt); 45 lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO; 46 writel(lcnt, &i2c_regs_p->ic_hs_scl_lcnt); 47 break; 48 49 case IC_SPEED_MODE_STANDARD: 50 cntl |= IC_CON_SPD_SS; 51 hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO; 52 writel(hcnt, &i2c_regs_p->ic_ss_scl_hcnt); 53 lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO; 54 writel(lcnt, &i2c_regs_p->ic_ss_scl_lcnt); 55 break; 56 57 case IC_SPEED_MODE_FAST: 58 default: 59 cntl |= IC_CON_SPD_FS; 60 hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO; 61 writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt); 62 lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO; 63 writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt); 64 break; 65 } 66 67 writel(cntl, &i2c_regs_p->ic_con); 68 69 /* Enable back i2c now speed set */ 70 enbl |= IC_ENABLE_0B; 71 writel(enbl, &i2c_regs_p->ic_enable); 72 } 73 74 /* 75 * i2c_set_bus_speed - Set the i2c speed 76 * @speed: required i2c speed 77 * 78 * Set the i2c speed. 79 */ 80 int i2c_set_bus_speed(int speed) 81 { 82 if (speed >= I2C_MAX_SPEED) 83 set_speed(IC_SPEED_MODE_MAX); 84 else if (speed >= I2C_FAST_SPEED) 85 set_speed(IC_SPEED_MODE_FAST); 86 else 87 set_speed(IC_SPEED_MODE_STANDARD); 88 89 return 0; 90 } 91 92 /* 93 * i2c_get_bus_speed - Gets the i2c speed 94 * 95 * Gets the i2c speed. 96 */ 97 int i2c_get_bus_speed(void) 98 { 99 u32 cntl; 100 101 cntl = (readl(&i2c_regs_p->ic_con) & IC_CON_SPD_MSK); 102 103 if (cntl == IC_CON_SPD_HS) 104 return I2C_MAX_SPEED; 105 else if (cntl == IC_CON_SPD_FS) 106 return I2C_FAST_SPEED; 107 else if (cntl == IC_CON_SPD_SS) 108 return I2C_STANDARD_SPEED; 109 110 return 0; 111 } 112 113 /* 114 * i2c_init - Init function 115 * @speed: required i2c speed 116 * @slaveadd: slave address for the device 117 * 118 * Initialization function. 119 */ 120 void i2c_init(int speed, int slaveadd) 121 { 122 unsigned int enbl; 123 124 /* Disable i2c */ 125 enbl = readl(&i2c_regs_p->ic_enable); 126 enbl &= ~IC_ENABLE_0B; 127 writel(enbl, &i2c_regs_p->ic_enable); 128 129 writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_regs_p->ic_con); 130 writel(IC_RX_TL, &i2c_regs_p->ic_rx_tl); 131 writel(IC_TX_TL, &i2c_regs_p->ic_tx_tl); 132 i2c_set_bus_speed(speed); 133 writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask); 134 writel(slaveadd, &i2c_regs_p->ic_sar); 135 136 /* Enable i2c */ 137 enbl = readl(&i2c_regs_p->ic_enable); 138 enbl |= IC_ENABLE_0B; 139 writel(enbl, &i2c_regs_p->ic_enable); 140 141 #ifdef CONFIG_I2C_MULTI_BUS 142 bus_initialized[current_bus] = 1; 143 #endif 144 } 145 146 /* 147 * i2c_setaddress - Sets the target slave address 148 * @i2c_addr: target i2c address 149 * 150 * Sets the target slave address. 151 */ 152 static void i2c_setaddress(unsigned int i2c_addr) 153 { 154 writel(i2c_addr, &i2c_regs_p->ic_tar); 155 } 156 157 /* 158 * i2c_flush_rxfifo - Flushes the i2c RX FIFO 159 * 160 * Flushes the i2c RX FIFO 161 */ 162 static void i2c_flush_rxfifo(void) 163 { 164 while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) 165 readl(&i2c_regs_p->ic_cmd_data); 166 } 167 168 /* 169 * i2c_wait_for_bb - Waits for bus busy 170 * 171 * Waits for bus busy 172 */ 173 static int i2c_wait_for_bb(void) 174 { 175 unsigned long start_time_bb = get_timer(0); 176 177 while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) || 178 !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) { 179 180 /* Evaluate timeout */ 181 if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB)) 182 return 1; 183 } 184 185 return 0; 186 } 187 188 /* check parameters for i2c_read and i2c_write */ 189 static int check_params(uint addr, int alen, uchar *buffer, int len) 190 { 191 if (buffer == NULL) { 192 printf("Buffer is invalid\n"); 193 return 1; 194 } 195 196 if (alen > 1) { 197 printf("addr len %d not supported\n", alen); 198 return 1; 199 } 200 201 if (addr + len > 256) { 202 printf("address out of range\n"); 203 return 1; 204 } 205 206 return 0; 207 } 208 209 static int i2c_xfer_init(uchar chip, uint addr) 210 { 211 if (i2c_wait_for_bb()) 212 return 1; 213 214 i2c_setaddress(chip); 215 writel(addr, &i2c_regs_p->ic_cmd_data); 216 217 return 0; 218 } 219 220 static int i2c_xfer_finish(void) 221 { 222 ulong start_stop_det = get_timer(0); 223 224 while (1) { 225 if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) { 226 readl(&i2c_regs_p->ic_clr_stop_det); 227 break; 228 } else if (get_timer(start_stop_det) > I2C_STOPDET_TO) { 229 break; 230 } 231 } 232 233 if (i2c_wait_for_bb()) { 234 printf("Timed out waiting for bus\n"); 235 return 1; 236 } 237 238 i2c_flush_rxfifo(); 239 240 /* Wait for read/write operation to complete on actual memory */ 241 udelay(10000); 242 243 return 0; 244 } 245 246 /* 247 * i2c_read - Read from i2c memory 248 * @chip: target i2c address 249 * @addr: address to read from 250 * @alen: 251 * @buffer: buffer for read data 252 * @len: no of bytes to be read 253 * 254 * Read from i2c memory. 255 */ 256 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 257 { 258 unsigned long start_time_rx; 259 260 if (check_params(addr, alen, buffer, len)) 261 return 1; 262 263 if (i2c_xfer_init(chip, addr)) 264 return 1; 265 266 start_time_rx = get_timer(0); 267 while (len) { 268 if (len == 1) 269 writel(IC_CMD | IC_STOP, &i2c_regs_p->ic_cmd_data); 270 else 271 writel(IC_CMD, &i2c_regs_p->ic_cmd_data); 272 273 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) { 274 *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data); 275 len--; 276 start_time_rx = get_timer(0); 277 278 } else if (get_timer(start_time_rx) > I2C_BYTE_TO) { 279 return 1; 280 } 281 } 282 283 return i2c_xfer_finish(); 284 } 285 286 /* 287 * i2c_write - Write to i2c memory 288 * @chip: target i2c address 289 * @addr: address to read from 290 * @alen: 291 * @buffer: buffer for read data 292 * @len: no of bytes to be read 293 * 294 * Write to i2c memory. 295 */ 296 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 297 { 298 int nb = len; 299 unsigned long start_time_tx; 300 301 if (check_params(addr, alen, buffer, len)) 302 return 1; 303 304 if (i2c_xfer_init(chip, addr)) 305 return 1; 306 307 start_time_tx = get_timer(0); 308 while (len) { 309 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) { 310 if (--len == 0) 311 writel(*buffer | IC_STOP, &i2c_regs_p->ic_cmd_data); 312 else 313 writel(*buffer, &i2c_regs_p->ic_cmd_data); 314 buffer++; 315 start_time_tx = get_timer(0); 316 317 } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) { 318 printf("Timed out. i2c write Failed\n"); 319 return 1; 320 } 321 } 322 323 return i2c_xfer_finish(); 324 } 325 326 /* 327 * i2c_probe - Probe the i2c chip 328 */ 329 int i2c_probe(uchar chip) 330 { 331 u32 tmp; 332 int ret; 333 334 /* 335 * Try to read the first location of the chip. 336 */ 337 ret = i2c_read(chip, 0, 1, (uchar *)&tmp, 1); 338 if (ret) 339 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 340 341 return ret; 342 } 343 344 #ifdef CONFIG_I2C_MULTI_BUS 345 int i2c_set_bus_num(unsigned int bus) 346 { 347 switch (bus) { 348 case 0: 349 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE; 350 break; 351 #ifdef CONFIG_SYS_I2C_BASE1 352 case 1: 353 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1; 354 break; 355 #endif 356 #ifdef CONFIG_SYS_I2C_BASE2 357 case 2: 358 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2; 359 break; 360 #endif 361 #ifdef CONFIG_SYS_I2C_BASE3 362 case 3: 363 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3; 364 break; 365 #endif 366 #ifdef CONFIG_SYS_I2C_BASE4 367 case 4: 368 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4; 369 break; 370 #endif 371 #ifdef CONFIG_SYS_I2C_BASE5 372 case 5: 373 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5; 374 break; 375 #endif 376 #ifdef CONFIG_SYS_I2C_BASE6 377 case 6: 378 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6; 379 break; 380 #endif 381 #ifdef CONFIG_SYS_I2C_BASE7 382 case 7: 383 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7; 384 break; 385 #endif 386 #ifdef CONFIG_SYS_I2C_BASE8 387 case 8: 388 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8; 389 break; 390 #endif 391 #ifdef CONFIG_SYS_I2C_BASE9 392 case 9: 393 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9; 394 break; 395 #endif 396 default: 397 printf("Bad bus: %d\n", bus); 398 return -1; 399 } 400 401 current_bus = bus; 402 403 if (!bus_initialized[current_bus]) 404 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 405 406 return 0; 407 } 408 409 int i2c_get_bus_num(void) 410 { 411 return current_bus; 412 } 413 #endif 414