1 /* 2 * Copyright (C) 2012-2020 ASPEED Technology Inc. 3 * Copyright 2016 IBM Corporation 4 * Copyright 2017 Google, Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <common.h> 10 #include <clk.h> 11 #include <dm.h> 12 #include <errno.h> 13 #include <fdtdec.h> 14 #include <i2c.h> 15 #include <asm/io.h> 16 #include <asm/arch/scu_ast2500.h> 17 18 #include "ast_i2c.h" 19 20 #define I2C_TIMEOUT_US 100000 21 #define I2C_SLEEP_STEP_US 20 22 23 #define HIGHSPEED_TTIMEOUT 3 24 25 DECLARE_GLOBAL_DATA_PTR; 26 27 /* 28 * Device private data 29 */ 30 struct ast_i2c_priv { 31 /* This device's clock */ 32 struct clk clk; 33 /* Device registers */ 34 struct ast_i2c_regs *regs; 35 /* I2C speed in Hz */ 36 int speed; 37 }; 38 39 /* 40 * Given desired divider ratio, return the value that needs to be set 41 * in Clock and AC Timing Control register 42 */ 43 static u32 get_clk_reg_val(ulong divider_ratio) 44 { 45 ulong inc = 0, div; 46 ulong scl_low, scl_high, data; 47 48 for (div = 0; divider_ratio >= 16; div++) { 49 inc |= (divider_ratio & 1); 50 divider_ratio >>= 1; 51 } 52 divider_ratio += inc; 53 scl_low = (divider_ratio >> 1) - 1; 54 scl_high = divider_ratio - scl_low - 2; 55 data = I2CD_CACTC_BASE 56 | (scl_high << I2CD_TCKHIGH_SHIFT) 57 | (scl_low << I2CD_TCKLOW_SHIFT) 58 | (div << I2CD_BASE_DIV_SHIFT); 59 60 return data; 61 } 62 63 static void ast_i2c_clear_interrupts(struct udevice *dev) 64 { 65 struct ast_i2c_priv *priv = dev_get_priv(dev); 66 67 writel(~0, &priv->regs->isr); 68 } 69 70 static void ast_i2c_init_bus(struct udevice *dev) 71 { 72 struct ast_i2c_priv *priv = dev_get_priv(dev); 73 74 /* Reset device */ 75 writel(0, &priv->regs->fcr); 76 /* Enable Master Mode. Assuming single-master */ 77 writel(I2CD_MASTER_EN 78 | I2CD_M_SDA_LOCK_EN 79 | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN, 80 &priv->regs->fcr); 81 /* Enable Interrupts */ 82 writel(I2CD_INTR_TX_ACK 83 | I2CD_INTR_TX_NAK 84 | I2CD_INTR_RX_DONE 85 | I2CD_INTR_BUS_RECOVER_DONE 86 | I2CD_INTR_NORMAL_STOP 87 | I2CD_INTR_ABNORMAL, &priv->regs->icr); 88 } 89 90 static int ast_i2c_ofdata_to_platdata(struct udevice *dev) 91 { 92 struct ast_i2c_priv *priv = dev_get_priv(dev); 93 int ret; 94 95 priv->regs = devfdt_get_addr_ptr(dev); 96 if (IS_ERR(priv->regs)) 97 return PTR_ERR(priv->regs); 98 99 ret = clk_get_by_index(dev, 0, &priv->clk); 100 if (ret < 0) { 101 debug("%s: Can't get clock for %s: %d\n", __func__, dev->name, 102 ret); 103 return ret; 104 } 105 106 return 0; 107 } 108 109 static int ast_i2c_probe(struct udevice *dev) 110 { 111 struct ast2500_scu *scu; 112 113 debug("Enabling I2C%u\n", dev->seq); 114 115 /* 116 * Get all I2C devices out of Reset. 117 * Only needs to be done once, but doing it for every 118 * device does not hurt. 119 */ 120 scu = ast_get_scu(); 121 ast_scu_unlock(scu); 122 clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C); 123 ast_scu_lock(scu); 124 125 ast_i2c_init_bus(dev); 126 127 return 0; 128 } 129 130 static int ast_i2c_wait_isr(struct udevice *dev, u32 flag) 131 { 132 struct ast_i2c_priv *priv = dev_get_priv(dev); 133 int timeout = I2C_TIMEOUT_US; 134 135 while (!(readl(&priv->regs->isr) & flag) && timeout > 0) { 136 udelay(I2C_SLEEP_STEP_US); 137 timeout -= I2C_SLEEP_STEP_US; 138 } 139 140 ast_i2c_clear_interrupts(dev); 141 if (timeout <= 0) 142 return -ETIMEDOUT; 143 144 return 0; 145 } 146 147 static int ast_i2c_send_stop(struct udevice *dev) 148 { 149 struct ast_i2c_priv *priv = dev_get_priv(dev); 150 151 writel(I2CD_M_STOP_CMD, &priv->regs->csr); 152 153 return ast_i2c_wait_isr(dev, I2CD_INTR_NORMAL_STOP); 154 } 155 156 static int ast_i2c_wait_tx(struct udevice *dev) 157 { 158 struct ast_i2c_priv *priv = dev_get_priv(dev); 159 int timeout = I2C_TIMEOUT_US; 160 u32 flag = I2CD_INTR_TX_ACK | I2CD_INTR_TX_NAK; 161 u32 status = readl(&priv->regs->isr) & flag; 162 int ret = 0; 163 164 while (!status && timeout > 0) { 165 status = readl(&priv->regs->isr) & flag; 166 udelay(I2C_SLEEP_STEP_US); 167 timeout -= I2C_SLEEP_STEP_US; 168 } 169 170 if (status == I2CD_INTR_TX_NAK) 171 ret = -EREMOTEIO; 172 173 if (timeout <= 0) 174 ret = -ETIMEDOUT; 175 176 ast_i2c_clear_interrupts(dev); 177 178 return ret; 179 } 180 181 static int ast_i2c_start_txn(struct udevice *dev, uint devaddr) 182 { 183 struct ast_i2c_priv *priv = dev_get_priv(dev); 184 185 /* Start and Send Device Address */ 186 writel(devaddr, &priv->regs->trbbr); 187 writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr); 188 189 return ast_i2c_wait_tx(dev); 190 } 191 192 static int ast_i2c_read_data(struct udevice *dev, u8 chip_addr, u8 *buffer, 193 size_t len, bool send_stop) 194 { 195 struct ast_i2c_priv *priv = dev_get_priv(dev); 196 u32 i2c_cmd = I2CD_M_RX_CMD; 197 int ret; 198 199 ret = ast_i2c_start_txn(dev, (chip_addr << 1) | I2C_M_RD); 200 if (ret < 0) 201 return ret; 202 203 for (; len > 0; len--, buffer++) { 204 if (len == 1) 205 i2c_cmd |= I2CD_M_S_RX_CMD_LAST; 206 writel(i2c_cmd, &priv->regs->csr); 207 ret = ast_i2c_wait_isr(dev, I2CD_INTR_RX_DONE); 208 if (ret < 0) 209 return ret; 210 *buffer = (readl(&priv->regs->trbbr) & I2CD_RX_DATA_MASK) 211 >> I2CD_RX_DATA_SHIFT; 212 } 213 ast_i2c_clear_interrupts(dev); 214 215 if (send_stop) 216 return ast_i2c_send_stop(dev); 217 218 return 0; 219 } 220 221 static int ast_i2c_write_data(struct udevice *dev, u8 chip_addr, u8 222 *buffer, size_t len, bool send_stop) 223 { 224 struct ast_i2c_priv *priv = dev_get_priv(dev); 225 int ret; 226 227 ret = ast_i2c_start_txn(dev, (chip_addr << 1)); 228 if (ret < 0) 229 return ret; 230 231 for (; len > 0; len--, buffer++) { 232 writel(*buffer, &priv->regs->trbbr); 233 writel(I2CD_M_TX_CMD, &priv->regs->csr); 234 ret = ast_i2c_wait_tx(dev); 235 if (ret < 0) 236 return ret; 237 } 238 239 if (send_stop) 240 return ast_i2c_send_stop(dev); 241 242 return 0; 243 } 244 245 static int ast_i2c_deblock(struct udevice *dev) 246 { 247 struct ast_i2c_priv *priv = dev_get_priv(dev); 248 struct ast_i2c_regs *regs = priv->regs; 249 u32 csr = readl(®s->csr); 250 bool sda_high = csr & I2CD_SDA_LINE_STS; 251 bool scl_high = csr & I2CD_SCL_LINE_STS; 252 int ret = 0; 253 254 if (sda_high && scl_high) { 255 /* Bus is idle, no deblocking needed. */ 256 return 0; 257 } else if (sda_high) { 258 /* Send stop command */ 259 debug("Unterminated TXN in (%x), sending stop\n", csr); 260 ret = ast_i2c_send_stop(dev); 261 } else if (scl_high) { 262 /* Possibly stuck slave */ 263 debug("Bus stuck (%x), attempting recovery\n", csr); 264 writel(I2CD_BUS_RECOVER_CMD, ®s->csr); 265 ret = ast_i2c_wait_isr(dev, I2CD_INTR_BUS_RECOVER_DONE); 266 } else { 267 /* Just try to reinit the device. */ 268 ast_i2c_init_bus(dev); 269 } 270 271 return ret; 272 } 273 274 static int ast_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) 275 { 276 int ret; 277 278 ret = ast_i2c_deblock(dev); 279 if (ret < 0) 280 return ret; 281 282 debug("i2c_xfer: %d messages\n", nmsgs); 283 for (; nmsgs > 0; nmsgs--, msg++) { 284 if (msg->flags & I2C_M_RD) { 285 debug("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n", 286 msg->addr, msg->len, msg->flags); 287 ret = ast_i2c_read_data(dev, msg->addr, msg->buf, 288 msg->len, (nmsgs == 1)); 289 } else { 290 debug("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n", 291 msg->addr, msg->len, msg->flags); 292 ret = ast_i2c_write_data(dev, msg->addr, msg->buf, 293 msg->len, (nmsgs == 1)); 294 } 295 if (ret) { 296 debug("%s: error (%d)\n", __func__, ret); 297 return -EREMOTEIO; 298 } 299 } 300 301 return 0; 302 } 303 304 static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed) 305 { 306 struct ast_i2c_priv *priv = dev_get_priv(dev); 307 struct ast_i2c_regs *regs = priv->regs; 308 ulong i2c_rate, divider; 309 310 debug("Setting speed for I2C%d to <%u>\n", dev->seq, speed); 311 if (!speed) { 312 debug("No valid speed specified\n"); 313 return -EINVAL; 314 } 315 316 i2c_rate = clk_get_rate(&priv->clk); 317 divider = i2c_rate / speed; 318 319 priv->speed = speed; 320 if (speed > I2C_HIGHSPEED_RATE) { 321 debug("Enable High Speed\n"); 322 setbits_le32(®s->fcr, I2CD_M_HIGH_SPEED_EN 323 | I2CD_M_SDA_DRIVE_1T_EN 324 | I2CD_SDA_DRIVE_1T_EN); 325 writel(HIGHSPEED_TTIMEOUT, ®s->cactcr2); 326 } else { 327 debug("Enabling Normal Speed\n"); 328 writel(I2CD_NO_TIMEOUT_CTRL, ®s->cactcr2); 329 } 330 331 writel(get_clk_reg_val(divider), ®s->cactcr1); 332 ast_i2c_clear_interrupts(dev); 333 334 return 0; 335 } 336 337 static const struct dm_i2c_ops ast_i2c_ops = { 338 .xfer = ast_i2c_xfer, 339 .set_bus_speed = ast_i2c_set_speed, 340 .deblock = ast_i2c_deblock, 341 }; 342 343 static const struct udevice_id ast_i2c_ids[] = { 344 { .compatible = "aspeed,ast2400-i2c-bus" }, 345 { .compatible = "aspeed,ast2500-i2c-bus" }, 346 { }, 347 }; 348 349 U_BOOT_DRIVER(ast_i2c) = { 350 .name = "ast_i2c", 351 .id = UCLASS_I2C, 352 .of_match = ast_i2c_ids, 353 .probe = ast_i2c_probe, 354 .ofdata_to_platdata = ast_i2c_ofdata_to_platdata, 355 .priv_auto_alloc_size = sizeof(struct ast_i2c_priv), 356 .ops = &ast_i2c_ops, 357 }; 358