1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2012-2020 ASPEED Technology Inc. 4 * Copyright 2016 IBM Corporation 5 * Copyright 2017 Google, Inc. 6 */ 7 8 #include <common.h> 9 #include <clk.h> 10 #include <dm.h> 11 #include <errno.h> 12 #include <fdtdec.h> 13 #include <i2c.h> 14 #include <asm/io.h> 15 #include <asm/arch/scu_ast2500.h> 16 17 #include "ast_i2c.h" 18 19 #define I2C_TIMEOUT_US 100000 20 #define I2C_SLEEP_STEP_US 20 21 22 #define HIGHSPEED_TTIMEOUT 3 23 24 /* 25 * Device private data 26 */ 27 struct ast_i2c_priv { 28 /* This device's clock */ 29 struct clk clk; 30 /* Device registers */ 31 struct ast_i2c_regs *regs; 32 /* I2C speed in Hz */ 33 int speed; 34 }; 35 36 /* 37 * Given desired divider ratio, return the value that needs to be set 38 * in Clock and AC Timing Control register 39 */ 40 static u32 get_clk_reg_val(ulong divider_ratio) 41 { 42 ulong inc = 0, div; 43 ulong scl_low, scl_high, data; 44 45 for (div = 0; divider_ratio >= 16; div++) { 46 inc |= (divider_ratio & 1); 47 divider_ratio >>= 1; 48 } 49 divider_ratio += inc; 50 scl_low = (divider_ratio >> 1) - 1; 51 scl_high = divider_ratio - scl_low - 2; 52 data = I2CD_CACTC_BASE 53 | (scl_high << I2CD_TCKHIGH_SHIFT) 54 | (scl_low << I2CD_TCKLOW_SHIFT) 55 | (div << I2CD_BASE_DIV_SHIFT); 56 57 return data; 58 } 59 60 static void ast_i2c_clear_interrupts(struct udevice *dev) 61 { 62 struct ast_i2c_priv *priv = dev_get_priv(dev); 63 64 writel(~0, &priv->regs->isr); 65 } 66 67 static void ast_i2c_init_bus(struct udevice *dev) 68 { 69 struct ast_i2c_priv *priv = dev_get_priv(dev); 70 71 /* Reset device */ 72 writel(0, &priv->regs->fcr); 73 /* Enable Master Mode. Assuming single-master */ 74 writel(I2CD_MASTER_EN 75 | I2CD_M_SDA_LOCK_EN 76 | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN, 77 &priv->regs->fcr); 78 /* Enable Interrupts */ 79 writel(I2CD_INTR_TX_ACK 80 | I2CD_INTR_TX_NAK 81 | I2CD_INTR_RX_DONE 82 | I2CD_INTR_BUS_RECOVER_DONE 83 | I2CD_INTR_NORMAL_STOP 84 | I2CD_INTR_ABNORMAL, &priv->regs->icr); 85 } 86 87 static int ast_i2c_ofdata_to_platdata(struct udevice *dev) 88 { 89 struct ast_i2c_priv *priv = dev_get_priv(dev); 90 int ret; 91 92 priv->regs = devfdt_get_addr_ptr(dev); 93 if (IS_ERR(priv->regs)) 94 return PTR_ERR(priv->regs); 95 96 ret = clk_get_by_index(dev, 0, &priv->clk); 97 if (ret < 0) { 98 debug("%s: Can't get clock for %s: %d\n", __func__, dev->name, 99 ret); 100 return ret; 101 } 102 103 return 0; 104 } 105 106 static int ast_i2c_probe(struct udevice *dev) 107 { 108 // struct ast2500_scu *scu; 109 110 debug("Enabling I2C%u\n", dev->seq); 111 112 /* 113 * Get all I2C devices out of Reset. 114 * Only needs to be done once, but doing it for every 115 * device does not hurt. 116 */ 117 118 //TODO scu reset and get clk 119 120 ast_i2c_init_bus(dev); 121 122 return 0; 123 } 124 125 static int ast_i2c_wait_isr(struct udevice *dev, u32 flag) 126 { 127 struct ast_i2c_priv *priv = dev_get_priv(dev); 128 int timeout = I2C_TIMEOUT_US; 129 130 while (!(readl(&priv->regs->isr) & flag) && timeout > 0) { 131 udelay(I2C_SLEEP_STEP_US); 132 timeout -= I2C_SLEEP_STEP_US; 133 } 134 135 ast_i2c_clear_interrupts(dev); 136 if (timeout <= 0) 137 return -ETIMEDOUT; 138 139 return 0; 140 } 141 142 static int ast_i2c_send_stop(struct udevice *dev) 143 { 144 struct ast_i2c_priv *priv = dev_get_priv(dev); 145 146 writel(I2CD_M_STOP_CMD, &priv->regs->csr); 147 148 return ast_i2c_wait_isr(dev, I2CD_INTR_NORMAL_STOP); 149 } 150 151 static int ast_i2c_wait_tx(struct udevice *dev) 152 { 153 struct ast_i2c_priv *priv = dev_get_priv(dev); 154 int timeout = I2C_TIMEOUT_US; 155 u32 flag = I2CD_INTR_TX_ACK | I2CD_INTR_TX_NAK; 156 u32 status = readl(&priv->regs->isr) & flag; 157 int ret = 0; 158 159 while (!status && timeout > 0) { 160 status = readl(&priv->regs->isr) & flag; 161 udelay(I2C_SLEEP_STEP_US); 162 timeout -= I2C_SLEEP_STEP_US; 163 } 164 165 if (status == I2CD_INTR_TX_NAK) 166 ret = -EREMOTEIO; 167 168 if (timeout <= 0) 169 ret = -ETIMEDOUT; 170 171 ast_i2c_clear_interrupts(dev); 172 173 return ret; 174 } 175 176 static int ast_i2c_start_txn(struct udevice *dev, uint devaddr) 177 { 178 struct ast_i2c_priv *priv = dev_get_priv(dev); 179 180 /* Start and Send Device Address */ 181 writel(devaddr, &priv->regs->trbbr); 182 writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr); 183 184 return ast_i2c_wait_tx(dev); 185 } 186 187 static int ast_i2c_read_data(struct udevice *dev, u8 chip_addr, u8 *buffer, 188 size_t len, bool send_stop) 189 { 190 struct ast_i2c_priv *priv = dev_get_priv(dev); 191 u32 i2c_cmd = I2CD_M_RX_CMD; 192 int ret; 193 194 ret = ast_i2c_start_txn(dev, (chip_addr << 1) | I2C_M_RD); 195 if (ret < 0) 196 return ret; 197 198 for (; len > 0; len--, buffer++) { 199 if (len == 1) 200 i2c_cmd |= I2CD_M_S_RX_CMD_LAST; 201 writel(i2c_cmd, &priv->regs->csr); 202 ret = ast_i2c_wait_isr(dev, I2CD_INTR_RX_DONE); 203 if (ret < 0) 204 return ret; 205 *buffer = (readl(&priv->regs->trbbr) & I2CD_RX_DATA_MASK) 206 >> I2CD_RX_DATA_SHIFT; 207 } 208 ast_i2c_clear_interrupts(dev); 209 210 if (send_stop) 211 return ast_i2c_send_stop(dev); 212 213 return 0; 214 } 215 216 static int ast_i2c_write_data(struct udevice *dev, u8 chip_addr, u8 217 *buffer, size_t len, bool send_stop) 218 { 219 struct ast_i2c_priv *priv = dev_get_priv(dev); 220 int ret; 221 222 ret = ast_i2c_start_txn(dev, (chip_addr << 1)); 223 if (ret < 0) 224 return ret; 225 226 for (; len > 0; len--, buffer++) { 227 writel(*buffer, &priv->regs->trbbr); 228 writel(I2CD_M_TX_CMD, &priv->regs->csr); 229 ret = ast_i2c_wait_tx(dev); 230 if (ret < 0) 231 return ret; 232 } 233 234 if (send_stop) 235 return ast_i2c_send_stop(dev); 236 237 return 0; 238 } 239 240 static int ast_i2c_deblock(struct udevice *dev) 241 { 242 struct ast_i2c_priv *priv = dev_get_priv(dev); 243 struct ast_i2c_regs *regs = priv->regs; 244 u32 csr = readl(®s->csr); 245 bool sda_high = csr & I2CD_SDA_LINE_STS; 246 bool scl_high = csr & I2CD_SCL_LINE_STS; 247 int ret = 0; 248 249 if (sda_high && scl_high) { 250 /* Bus is idle, no deblocking needed. */ 251 return 0; 252 } else if (sda_high) { 253 /* Send stop command */ 254 debug("Unterminated TXN in (%x), sending stop\n", csr); 255 ret = ast_i2c_send_stop(dev); 256 } else if (scl_high) { 257 /* Possibly stuck slave */ 258 debug("Bus stuck (%x), attempting recovery\n", csr); 259 writel(I2CD_BUS_RECOVER_CMD, ®s->csr); 260 ret = ast_i2c_wait_isr(dev, I2CD_INTR_BUS_RECOVER_DONE); 261 } else { 262 /* Just try to reinit the device. */ 263 ast_i2c_init_bus(dev); 264 } 265 266 return ret; 267 } 268 269 static int ast_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) 270 { 271 int ret; 272 273 ret = ast_i2c_deblock(dev); 274 if (ret < 0) 275 return ret; 276 277 debug("i2c_xfer: %d messages\n", nmsgs); 278 for (; nmsgs > 0; nmsgs--, msg++) { 279 if (msg->flags & I2C_M_RD) { 280 debug("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n", 281 msg->addr, msg->len, msg->flags); 282 ret = ast_i2c_read_data(dev, msg->addr, msg->buf, 283 msg->len, (nmsgs == 1)); 284 } else { 285 debug("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n", 286 msg->addr, msg->len, msg->flags); 287 ret = ast_i2c_write_data(dev, msg->addr, msg->buf, 288 msg->len, (nmsgs == 1)); 289 } 290 if (ret) { 291 debug("%s: error (%d)\n", __func__, ret); 292 return -EREMOTEIO; 293 } 294 } 295 296 return 0; 297 } 298 299 static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed) 300 { 301 struct ast_i2c_priv *priv = dev_get_priv(dev); 302 struct ast_i2c_regs *regs = priv->regs; 303 ulong i2c_rate, divider; 304 305 debug("Setting speed for I2C%d to <%u>\n", dev->seq, speed); 306 if (!speed) { 307 debug("No valid speed specified\n"); 308 return -EINVAL; 309 } 310 311 i2c_rate = clk_get_rate(&priv->clk); 312 divider = i2c_rate / speed; 313 314 priv->speed = speed; 315 if (speed > I2C_HIGHSPEED_RATE) { 316 debug("Enable High Speed\n"); 317 setbits_le32(®s->fcr, I2CD_M_HIGH_SPEED_EN 318 | I2CD_M_SDA_DRIVE_1T_EN 319 | I2CD_SDA_DRIVE_1T_EN); 320 writel(HIGHSPEED_TTIMEOUT, ®s->cactcr2); 321 } else { 322 debug("Enabling Normal Speed\n"); 323 writel(I2CD_NO_TIMEOUT_CTRL, ®s->cactcr2); 324 } 325 326 writel(get_clk_reg_val(divider), ®s->cactcr1); 327 ast_i2c_clear_interrupts(dev); 328 329 return 0; 330 } 331 332 static const struct dm_i2c_ops ast_i2c_ops = { 333 .xfer = ast_i2c_xfer, 334 .set_bus_speed = ast_i2c_set_speed, 335 .deblock = ast_i2c_deblock, 336 }; 337 338 static const struct udevice_id ast_i2c_ids[] = { 339 { .compatible = "aspeed,ast2400-i2c-bus" }, 340 { .compatible = "aspeed,ast2500-i2c-bus" }, 341 { .compatible = "aspeed,ast2600-i2c-bus" }, 342 { }, 343 }; 344 345 U_BOOT_DRIVER(ast_i2c) = { 346 .name = "ast_i2c", 347 .id = UCLASS_I2C, 348 .of_match = ast_i2c_ids, 349 .probe = ast_i2c_probe, 350 .ofdata_to_platdata = ast_i2c_ofdata_to_platdata, 351 .priv_auto_alloc_size = sizeof(struct ast_i2c_priv), 352 .ops = &ast_i2c_ops, 353 }; 354