xref: /openbmc/u-boot/drivers/i2c/Kconfig (revision 3b5df50e)
1config DM_I2C
2	bool "Enable Driver Model for I2C drivers"
3	depends on DM
4	help
5	  Enable driver model for I2C. The I2C uclass interface: probe, read,
6	  write and speed, is implemented with the bus drivers operations,
7	  which provide methods for bus setting and data transfer. Each chip
8	  device (bus child) info is kept as parent platdata. The interface
9	  is defined in include/i2c.h. When i2c bus driver supports the i2c
10	  uclass, but the device drivers not, then DM_I2C_COMPAT config can
11	  be used as compatibility layer.
12
13config DM_I2C_COMPAT
14	bool "Enable I2C compatibility layer"
15	depends on DM
16	help
17	  Enable old-style I2C functions for compatibility with existing code.
18	  This option can be enabled as a temporary measure to avoid needing
19	  to convert all code for a board in a single commit. It should not
20	  be enabled for any board in an official release.
21
22config I2C_CROS_EC_TUNNEL
23	tristate "Chrome OS EC tunnel I2C bus"
24	depends on CROS_EC
25	help
26	  This provides an I2C bus that will tunnel i2c commands through to
27	  the other side of the Chrome OS EC to the I2C bus connected there.
28	  This will work whatever the interface used to talk to the EC (SPI,
29	  I2C or LPC). Some Chromebooks use this when the hardware design
30	  does not allow direct access to the main PMIC from the AP.
31
32config I2C_CROS_EC_LDO
33	bool "Provide access to LDOs on the Chrome OS EC"
34	depends on CROS_EC
35	---help---
36	On many Chromebooks the main PMIC is inaccessible to the AP. This is
37	often dealt with by using an I2C pass-through interface provided by
38	the EC. On some unfortunate models (e.g. Spring) the pass-through
39	is not available, and an LDO message is available instead. This
40	option enables a driver which provides very basic access to those
41	regulators, via the EC. We implement this as an I2C bus	which
42	emulates just the TPS65090 messages we know about. This is done to
43	avoid duplicating the logic in the TPS65090 regulator driver for
44	enabling/disabling an LDO.
45
46config DM_I2C_GPIO
47	bool "Enable Driver Model for software emulated I2C bus driver"
48	depends on DM_I2C && DM_GPIO
49	help
50	  Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
51	  configuration is given by the device tree. Kernel-style device tree
52	  bindings are supported.
53	  Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
54
55config SYS_I2C_SANDBOX
56	bool "Sandbox I2C driver"
57	depends on SANDBOX && DM_I2C
58	help
59	  Enable I2C support for sandbox. This is an emulation of a real I2C
60	  bus. Devices can be attached to the bus using the device tree
61	  which specifies the driver to use. As an example, see this device
62	  tree fragment from sandbox.dts. It shows that the I2C bus has a
63	  single EEPROM at address 0x2c (7-bit address) which is emulated by
64	  the driver for "sandbox,i2c-eeprom", which is in
65	  drivers/misc/i2c_eeprom_emul.c.
66
67	  i2c@0 {
68		#address-cells = <1>;
69		#size-cells = <0>;
70		reg = <0>;
71		compatible = "sandbox,i2c";
72		clock-frequency = <400000>;
73		eeprom@2c {
74			reg = <0x2c>;
75			compatible = "i2c-eeprom";
76			emul {
77				compatible = "sandbox,i2c-eeprom";
78				sandbox,filename = "i2c.bin";
79				sandbox,size = <128>;
80			};
81		};
82	};
83
84
85config SYS_I2C_UNIPHIER
86	bool "UniPhier I2C driver"
87	depends on ARCH_UNIPHIER && DM_I2C
88	default y
89	help
90	  Support for UniPhier I2C controller driver.  This I2C controller
91	  is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
92
93config SYS_I2C_UNIPHIER_F
94	bool "UniPhier FIFO-builtin I2C driver"
95	depends on ARCH_UNIPHIER && DM_I2C
96	default y
97	help
98	  Support for UniPhier FIFO-builtin I2C controller driver.
99	  This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
100
101source "drivers/i2c/muxes/Kconfig"
102