xref: /openbmc/u-boot/drivers/i2c/Kconfig (revision fc760cc6)
10b11dbf7SMasahiro Yamada#
20b11dbf7SMasahiro Yamada# I2C subsystem configuration
30b11dbf7SMasahiro Yamada#
40b11dbf7SMasahiro Yamada
50b11dbf7SMasahiro Yamadamenu "I2C support"
60b11dbf7SMasahiro Yamada
7b6036bcdSMasahiro Yamadaconfig DM_I2C
8b6036bcdSMasahiro Yamada	bool "Enable Driver Model for I2C drivers"
9b6036bcdSMasahiro Yamada	depends on DM
10b6036bcdSMasahiro Yamada	help
11705fcf4dSPrzemyslaw Marczak	  Enable driver model for I2C. The I2C uclass interface: probe, read,
12705fcf4dSPrzemyslaw Marczak	  write and speed, is implemented with the bus drivers operations,
13705fcf4dSPrzemyslaw Marczak	  which provide methods for bus setting and data transfer. Each chip
14705fcf4dSPrzemyslaw Marczak	  device (bus child) info is kept as parent platdata. The interface
15705fcf4dSPrzemyslaw Marczak	  is defined in include/i2c.h. When i2c bus driver supports the i2c
16705fcf4dSPrzemyslaw Marczak	  uclass, but the device drivers not, then DM_I2C_COMPAT config can
17705fcf4dSPrzemyslaw Marczak	  be used as compatibility layer.
1826f820f3SMasahiro Yamada
194bba9d3fSSimon Glassconfig DM_I2C_COMPAT
204bba9d3fSSimon Glass	bool "Enable I2C compatibility layer"
214bba9d3fSSimon Glass	depends on DM
224bba9d3fSSimon Glass	help
234bba9d3fSSimon Glass	  Enable old-style I2C functions for compatibility with existing code.
244bba9d3fSSimon Glass	  This option can be enabled as a temporary measure to avoid needing
254bba9d3fSSimon Glass	  to convert all code for a board in a single commit. It should not
264bba9d3fSSimon Glass	  be enabled for any board in an official release.
274bba9d3fSSimon Glass
28cc456bd7SSimon Glassconfig I2C_CROS_EC_TUNNEL
29cc456bd7SSimon Glass	tristate "Chrome OS EC tunnel I2C bus"
30cc456bd7SSimon Glass	depends on CROS_EC
31cc456bd7SSimon Glass	help
32cc456bd7SSimon Glass	  This provides an I2C bus that will tunnel i2c commands through to
33cc456bd7SSimon Glass	  the other side of the Chrome OS EC to the I2C bus connected there.
34cc456bd7SSimon Glass	  This will work whatever the interface used to talk to the EC (SPI,
35cc456bd7SSimon Glass	  I2C or LPC). Some Chromebooks use this when the hardware design
36cc456bd7SSimon Glass	  does not allow direct access to the main PMIC from the AP.
37cc456bd7SSimon Glass
38f48eaf01SSimon Glassconfig I2C_CROS_EC_LDO
39f48eaf01SSimon Glass	bool "Provide access to LDOs on the Chrome OS EC"
40f48eaf01SSimon Glass	depends on CROS_EC
41f48eaf01SSimon Glass	---help---
42f48eaf01SSimon Glass	On many Chromebooks the main PMIC is inaccessible to the AP. This is
43f48eaf01SSimon Glass	often dealt with by using an I2C pass-through interface provided by
44f48eaf01SSimon Glass	the EC. On some unfortunate models (e.g. Spring) the pass-through
45f48eaf01SSimon Glass	is not available, and an LDO message is available instead. This
46f48eaf01SSimon Glass	option enables a driver which provides very basic access to those
47f48eaf01SSimon Glass	regulators, via the EC. We implement this as an I2C bus	which
48f48eaf01SSimon Glass	emulates just the TPS65090 messages we know about. This is done to
49f48eaf01SSimon Glass	avoid duplicating the logic in the TPS65090 regulator driver for
50f48eaf01SSimon Glass	enabling/disabling an LDO.
51cc456bd7SSimon Glass
52e46f8a33SLukasz Majewskiconfig I2C_SET_DEFAULT_BUS_NUM
53e46f8a33SLukasz Majewski	bool "Set default I2C bus number"
54e46f8a33SLukasz Majewski	depends on DM_I2C
55e46f8a33SLukasz Majewski	help
56e46f8a33SLukasz Majewski	  Set default number of I2C bus to be accessed. This option provides
57e46f8a33SLukasz Majewski	  behaviour similar to old (i.e. pre DM) I2C bus driver.
58e46f8a33SLukasz Majewski
59e46f8a33SLukasz Majewskiconfig I2C_DEFAULT_BUS_NUMBER
60e46f8a33SLukasz Majewski	hex "I2C default bus number"
61e46f8a33SLukasz Majewski	depends on I2C_SET_DEFAULT_BUS_NUM
62e46f8a33SLukasz Majewski	default 0x0
63e46f8a33SLukasz Majewski	help
64e46f8a33SLukasz Majewski	  Number of default I2C bus to use
65e46f8a33SLukasz Majewski
66c54473cbSPrzemyslaw Marczakconfig DM_I2C_GPIO
67c54473cbSPrzemyslaw Marczak	bool "Enable Driver Model for software emulated I2C bus driver"
68c54473cbSPrzemyslaw Marczak	depends on DM_I2C && DM_GPIO
69c54473cbSPrzemyslaw Marczak	help
70c54473cbSPrzemyslaw Marczak	  Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
71c54473cbSPrzemyslaw Marczak	  configuration is given by the device tree. Kernel-style device tree
72c54473cbSPrzemyslaw Marczak	  bindings are supported.
73c54473cbSPrzemyslaw Marczak	  Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
74c54473cbSPrzemyslaw Marczak
758800e0faSSongjun Wuconfig SYS_I2C_AT91
768800e0faSSongjun Wu	bool "Atmel I2C driver"
778800e0faSSongjun Wu	depends on DM_I2C && ARCH_AT91
788800e0faSSongjun Wu	help
798800e0faSSongjun Wu	  Add support for the Atmel I2C driver. A serious problem is that there
808800e0faSSongjun Wu	  is no documented way to issue repeated START conditions for more than
818800e0faSSongjun Wu	  two messages, as needed to support combined I2C messages. Use the
828800e0faSSongjun Wu	  i2c-gpio driver unless your system can cope with this limitation.
838800e0faSSongjun Wu	  Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
848800e0faSSongjun Wu
85dbc82ce3Smario.six@gdsys.ccconfig SYS_I2C_FSL
86dbc82ce3Smario.six@gdsys.cc       bool "Freescale I2C bus driver"
87dbc82ce3Smario.six@gdsys.cc       depends on DM_I2C
88dbc82ce3Smario.six@gdsys.cc       help
89dbc82ce3Smario.six@gdsys.cc	  Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
90dbc82ce3Smario.six@gdsys.cc	  MPC85xx processors.
91dbc82ce3Smario.six@gdsys.cc
92fdec2d21SMoritz Fischerconfig SYS_I2C_CADENCE
93fdec2d21SMoritz Fischer	tristate "Cadence I2C Controller"
94fdec2d21SMoritz Fischer	depends on DM_I2C && (ARCH_ZYNQ || ARM64)
95fdec2d21SMoritz Fischer	help
96fdec2d21SMoritz Fischer	  Say yes here to select Cadence I2C Host Controller. This controller is
97fdec2d21SMoritz Fischer	  e.g. used by Xilinx Zynq.
98fdec2d21SMoritz Fischer
99e32d0db7SStefan Roeseconfig SYS_I2C_DW
100e32d0db7SStefan Roese	bool "Designware I2C Controller"
101e32d0db7SStefan Roese	default n
102e32d0db7SStefan Roese	help
103e32d0db7SStefan Roese	  Say yes here to select the Designware I2C Host Controller. This
104e32d0db7SStefan Roese	  controller is used in various SoCs, e.g. the ST SPEAr, Altera
105e32d0db7SStefan Roese	  SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
106e32d0db7SStefan Roese
1073a370528SStefan Roeseconfig SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
1083a370528SStefan Roese	bool "DW I2C Enable Status Register not supported"
1093a370528SStefan Roese	depends on SYS_I2C_DW && (TARGET_SPEAR300 || TARGET_SPEAR310 || \
1103a370528SStefan Roese		TARGET_SPEAR320 || TARGET_SPEAR600 || TARGET_X600)
1113a370528SStefan Roese	default y
1123a370528SStefan Roese	help
1133a370528SStefan Roese	  Some versions of the Designware I2C controller do not support the
1143a370528SStefan Roese	  enable status register. This config option can be enabled in such
1153a370528SStefan Roese	  cases.
1163a370528SStefan Roese
1174dc038f3Smaxims@google.comconfig SYS_I2C_ASPEED
1184dc038f3Smaxims@google.com	bool "Aspeed I2C Controller"
1194dc038f3Smaxims@google.com	depends on DM_I2C && ARCH_ASPEED
1204dc038f3Smaxims@google.com	help
1214dc038f3Smaxims@google.com	  Say yes here to select Aspeed I2C Host Controller. The driver
1224dc038f3Smaxims@google.com	  supports AST2500 and AST2400 controllers, but is very limited.
1234dc038f3Smaxims@google.com	  Only single master mode is supported and only byte-by-byte
1244dc038f3Smaxims@google.com	  synchronous reads and writes are supported, no Pool Buffers or DMA.
1254dc038f3Smaxims@google.com
126abb0b01eSSimon Glassconfig SYS_I2C_INTEL
127abb0b01eSSimon Glass	bool "Intel I2C/SMBUS driver"
128abb0b01eSSimon Glass	depends on DM_I2C
129abb0b01eSSimon Glass	help
130abb0b01eSSimon Glass	  Add support for the Intel SMBUS driver. So far this driver is just
131abb0b01eSSimon Glass	  a stub which perhaps some basic init. There is no implementation of
132abb0b01eSSimon Glass	  the I2C API meaning that any I2C operations will immediately fail
133abb0b01eSSimon Glass	  for now.
134abb0b01eSSimon Glass
1357ee3f149SPeng Fanconfig SYS_I2C_IMX_LPI2C
1367ee3f149SPeng Fan	bool "NXP i.MX LPI2C driver"
1377ee3f149SPeng Fan	help
1387ee3f149SPeng Fan	  Add support for the NXP i.MX LPI2C driver.
1397ee3f149SPeng Fan
14072c8c10bSJagan Tekiconfig SYS_I2C_MXC
14172c8c10bSJagan Teki	bool "NXP i.MX I2C driver"
14272c8c10bSJagan Teki	depends on MX6
14372c8c10bSJagan Teki	help
14472c8c10bSJagan Teki	  Add support for the NXP i.MX I2C driver. This supports upto for bus
14572c8c10bSJagan Teki	  channels and operating on standard mode upto 100 kbits/s and fast
14672c8c10bSJagan Teki	  mode upto 400 kbits/s.
14772c8c10bSJagan Teki
148daa0f050SAdam Fordconfig SYS_I2C_OMAP24XX
149daa0f050SAdam Ford	bool "TI OMAP2+ I2C driver"
150daa0f050SAdam Ford	depends on ARCH_OMAP2PLUS
151daa0f050SAdam Ford	help
152daa0f050SAdam Ford	  Add support for the OMAP2+ I2C driver.
153daa0f050SAdam Ford
15434374699SSimon Glassconfig SYS_I2C_ROCKCHIP
15534374699SSimon Glass	bool "Rockchip I2C driver"
15634374699SSimon Glass	depends on DM_I2C
15734374699SSimon Glass	help
15834374699SSimon Glass	  Add support for the Rockchip I2C driver. This is used with various
15934374699SSimon Glass	  Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
16034374699SSimon Glass	  have several I2C ports and all are provided, controled by the
16134374699SSimon Glass	  device tree.
16234374699SSimon Glass
1631174aadaSSimon Glassconfig SYS_I2C_SANDBOX
1641174aadaSSimon Glass	bool "Sandbox I2C driver"
1651174aadaSSimon Glass	depends on SANDBOX && DM_I2C
1661174aadaSSimon Glass	help
1671174aadaSSimon Glass	  Enable I2C support for sandbox. This is an emulation of a real I2C
1681174aadaSSimon Glass	  bus. Devices can be attached to the bus using the device tree
169c77c7db5SMasahiro Yamada	  which specifies the driver to use.  See sandbox.dts as an example.
1701174aadaSSimon Glass
1711d61ad95SJaehoon Chungconfig SYS_I2C_S3C24X0
1721d61ad95SJaehoon Chung	bool "Samsung I2C driver"
1731d61ad95SJaehoon Chung	depends on ARCH_EXYNOS4 && DM_I2C
1741d61ad95SJaehoon Chung	help
1751d61ad95SJaehoon Chung	  Support for Samsung I2C controller as Samsung SoCs.
1761174aadaSSimon Glass
1774fadcaf0SPatrice Chotardconfig SYS_I2C_STM32F7
1784fadcaf0SPatrice Chotard	bool "STMicroelectronics STM32F7 I2C support"
1794fadcaf0SPatrice Chotard	depends on (STM32F7 || STM32H7) && DM_I2C
1804fadcaf0SPatrice Chotard	help
1814fadcaf0SPatrice Chotard	  Enable this option to add support for STM32 I2C controller
1824fadcaf0SPatrice Chotard	  introduced with STM32F7/H7 SoCs. This I2C controller supports :
1834fadcaf0SPatrice Chotard	   _ Slave and master modes
1844fadcaf0SPatrice Chotard	   _ Multimaster capability
1854fadcaf0SPatrice Chotard	   _ Standard-mode (up to 100 kHz)
1864fadcaf0SPatrice Chotard	   _ Fast-mode (up to 400 kHz)
1874fadcaf0SPatrice Chotard	   _ Fast-mode Plus (up to 1 MHz)
1884fadcaf0SPatrice Chotard	   _ 7-bit and 10-bit addressing mode
1894fadcaf0SPatrice Chotard	   _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
1904fadcaf0SPatrice Chotard	   _ All 7-bit addresses acknowledge mode
1914fadcaf0SPatrice Chotard	   _ General call
1924fadcaf0SPatrice Chotard	   _ Programmable setup and hold times
1934fadcaf0SPatrice Chotard	   _ Easy to use event management
1944fadcaf0SPatrice Chotard	   _ Optional clock stretching
1954fadcaf0SPatrice Chotard	   _ Software reset
1964fadcaf0SPatrice Chotard
19726f820f3SMasahiro Yamadaconfig SYS_I2C_UNIPHIER
19826f820f3SMasahiro Yamada	bool "UniPhier I2C driver"
19926f820f3SMasahiro Yamada	depends on ARCH_UNIPHIER && DM_I2C
20026f820f3SMasahiro Yamada	default y
20126f820f3SMasahiro Yamada	help
202b6ef3a3fSMasahiro Yamada	  Support for UniPhier I2C controller driver.  This I2C controller
203b6ef3a3fSMasahiro Yamada	  is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
204238bd0b8SMasahiro Yamada
205238bd0b8SMasahiro Yamadaconfig SYS_I2C_UNIPHIER_F
206238bd0b8SMasahiro Yamada	bool "UniPhier FIFO-builtin I2C driver"
207238bd0b8SMasahiro Yamada	depends on ARCH_UNIPHIER && DM_I2C
208238bd0b8SMasahiro Yamada	default y
209238bd0b8SMasahiro Yamada	help
210b6ef3a3fSMasahiro Yamada	  Support for UniPhier FIFO-builtin I2C controller driver.
211238bd0b8SMasahiro Yamada	  This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
2123d1957f0SSimon Glass
21314a6ff2cSmario.six@gdsys.ccconfig SYS_I2C_MVTWSI
21414a6ff2cSmario.six@gdsys.cc	bool "Marvell I2C driver"
21514a6ff2cSmario.six@gdsys.cc	depends on DM_I2C
21614a6ff2cSmario.six@gdsys.cc	help
21714a6ff2cSmario.six@gdsys.cc	  Support for Marvell I2C controllers as used on the orion5x and
21814a6ff2cSmario.six@gdsys.cc	  kirkwood SoC families.
21914a6ff2cSmario.six@gdsys.cc
22034f1c9feSStephen Warrenconfig TEGRA186_BPMP_I2C
22134f1c9feSStephen Warren	bool "Enable Tegra186 BPMP-based I2C driver"
22234f1c9feSStephen Warren	depends on TEGRA186_BPMP
22334f1c9feSStephen Warren	help
22434f1c9feSStephen Warren	  Support for Tegra I2C controllers managed by the BPMP (Boot and
22534f1c9feSStephen Warren	  Power Management Processor). On Tegra186, some I2C controllers are
22634f1c9feSStephen Warren	  directly controlled by the main CPU, whereas others are controlled
22734f1c9feSStephen Warren	  by the BPMP, and can only be accessed by the main CPU via IPC
22834f1c9feSStephen Warren	  requests to the BPMP. This driver covers the latter case.
22934f1c9feSStephen Warren
230*fc760cc6SAdam Fordconfig SYS_I2C_BUS_MAX
231*fc760cc6SAdam Ford	int "Max I2C busses"
232*fc760cc6SAdam Ford	depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
233*fc760cc6SAdam Ford	default 2 if TI816X
234*fc760cc6SAdam Ford	default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
235*fc760cc6SAdam Ford	default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
236*fc760cc6SAdam Ford	default 5 if OMAP54XX
237*fc760cc6SAdam Ford	help
238*fc760cc6SAdam Ford	  Define the maximum number of available I2C buses.
239*fc760cc6SAdam Ford
2403d1957f0SSimon Glasssource "drivers/i2c/muxes/Kconfig"
2410b11dbf7SMasahiro Yamada
2420b11dbf7SMasahiro Yamadaendmenu
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