1 /* 2 * NVIDIA Tegra20 GPIO handling. 3 * (C) Copyright 2010-2012 4 * NVIDIA Corporation <www.nvidia.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 /* 26 * Based on (mostly copied from) kw_gpio.c based Linux 2.6 kernel driver. 27 * Tom Warren (twarren@nvidia.com) 28 */ 29 30 #include <common.h> 31 #include <asm/io.h> 32 #include <asm/bitops.h> 33 #include <asm/arch/tegra20.h> 34 #include <asm/gpio.h> 35 36 enum { 37 TEGRA20_CMD_INFO, 38 TEGRA20_CMD_PORT, 39 TEGRA20_CMD_OUTPUT, 40 TEGRA20_CMD_INPUT, 41 }; 42 43 static struct gpio_names { 44 char name[GPIO_NAME_SIZE]; 45 } gpio_names[MAX_NUM_GPIOS]; 46 47 static char *get_name(int i) 48 { 49 return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN"; 50 } 51 52 /* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */ 53 static int get_config(unsigned gpio) 54 { 55 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 56 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 57 u32 u; 58 int type; 59 60 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); 61 type = (u >> GPIO_BIT(gpio)) & 1; 62 63 debug("get_config: port = %d, bit = %d is %s\n", 64 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); 65 66 return type; 67 } 68 69 /* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */ 70 static void set_config(unsigned gpio, int type) 71 { 72 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 73 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 74 u32 u; 75 76 debug("set_config: port = %d, bit = %d, %s\n", 77 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); 78 79 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); 80 if (type) /* GPIO */ 81 u |= 1 << GPIO_BIT(gpio); 82 else 83 u &= ~(1 << GPIO_BIT(gpio)); 84 writel(u, &bank->gpio_config[GPIO_PORT(gpio)]); 85 } 86 87 /* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */ 88 static int get_direction(unsigned gpio) 89 { 90 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 91 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 92 u32 u; 93 int dir; 94 95 u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); 96 dir = (u >> GPIO_BIT(gpio)) & 1; 97 98 debug("get_direction: port = %d, bit = %d, %s\n", 99 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN"); 100 101 return dir; 102 } 103 104 /* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */ 105 static void set_direction(unsigned gpio, int output) 106 { 107 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 108 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 109 u32 u; 110 111 debug("set_direction: port = %d, bit = %d, %s\n", 112 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN"); 113 114 u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); 115 if (output) 116 u |= 1 << GPIO_BIT(gpio); 117 else 118 u &= ~(1 << GPIO_BIT(gpio)); 119 writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]); 120 } 121 122 /* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */ 123 static void set_level(unsigned gpio, int high) 124 { 125 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 126 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 127 u32 u; 128 129 debug("set_level: port = %d, bit %d == %d\n", 130 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high); 131 132 u = readl(&bank->gpio_out[GPIO_PORT(gpio)]); 133 if (high) 134 u |= 1 << GPIO_BIT(gpio); 135 else 136 u &= ~(1 << GPIO_BIT(gpio)); 137 writel(u, &bank->gpio_out[GPIO_PORT(gpio)]); 138 } 139 140 /* 141 * Generic_GPIO primitives. 142 */ 143 144 int gpio_request(unsigned gpio, const char *label) 145 { 146 if (gpio >= MAX_NUM_GPIOS) 147 return -1; 148 149 if (label != NULL) { 150 strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE); 151 gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0'; 152 } 153 154 /* Configure as a GPIO */ 155 set_config(gpio, 1); 156 157 return 0; 158 } 159 160 int gpio_free(unsigned gpio) 161 { 162 if (gpio >= MAX_NUM_GPIOS) 163 return -1; 164 165 gpio_names[gpio].name[0] = '\0'; 166 /* Do not configure as input or change pin mux here */ 167 return 0; 168 } 169 170 /* read GPIO OUT value of pin 'gpio' */ 171 static int gpio_get_output_value(unsigned gpio) 172 { 173 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 174 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 175 int val; 176 177 debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n", 178 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio)); 179 180 val = readl(&bank->gpio_out[GPIO_PORT(gpio)]); 181 182 return (val >> GPIO_BIT(gpio)) & 1; 183 } 184 185 /* set GPIO pin 'gpio' as an input */ 186 int gpio_direction_input(unsigned gpio) 187 { 188 debug("gpio_direction_input: pin = %d (port %d:bit %d)\n", 189 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio)); 190 191 /* Configure GPIO direction as input. */ 192 set_direction(gpio, 0); 193 194 return 0; 195 } 196 197 /* set GPIO pin 'gpio' as an output, with polarity 'value' */ 198 int gpio_direction_output(unsigned gpio, int value) 199 { 200 debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n", 201 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), 202 value ? "HIGH" : "LOW"); 203 204 /* Configure GPIO output value. */ 205 set_level(gpio, value); 206 207 /* Configure GPIO direction as output. */ 208 set_direction(gpio, 1); 209 210 return 0; 211 } 212 213 /* read GPIO IN value of pin 'gpio' */ 214 int gpio_get_value(unsigned gpio) 215 { 216 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 217 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 218 int val; 219 220 debug("gpio_get_value: pin = %d (port %d:bit %d)\n", 221 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio)); 222 223 val = readl(&bank->gpio_in[GPIO_PORT(gpio)]); 224 225 return (val >> GPIO_BIT(gpio)) & 1; 226 } 227 228 /* write GPIO OUT value to pin 'gpio' */ 229 int gpio_set_value(unsigned gpio, int value) 230 { 231 debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", 232 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value); 233 234 /* Configure GPIO output value. */ 235 set_level(gpio, value); 236 237 return 0; 238 } 239 240 /* 241 * Display Tegra GPIO information 242 */ 243 void gpio_info(void) 244 { 245 unsigned c; 246 int type; 247 248 for (c = 0; c < MAX_NUM_GPIOS; c++) { 249 type = get_config(c); /* GPIO, not SFPIO */ 250 if (type) { 251 printf("GPIO_%d:\t%s is an %s, ", c, 252 get_name(c), 253 get_direction(c) ? "OUTPUT" : "INPUT"); 254 if (get_direction(c)) 255 printf("value = %d", gpio_get_output_value(c)); 256 else 257 printf("value = %d", gpio_get_value(c)); 258 printf("\n"); 259 } else 260 continue; 261 } 262 } 263