1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved 4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 5 */ 6 7 #include <common.h> 8 #include <clk.h> 9 #include <dm.h> 10 #include <fdtdec.h> 11 #include <asm/arch/gpio.h> 12 #include <asm/arch/stm32.h> 13 #include <asm/gpio.h> 14 #include <asm/io.h> 15 #include <linux/errno.h> 16 #include <linux/io.h> 17 18 #define STM32_GPIOS_PER_BANK 16 19 #define MODE_BITS(gpio_pin) (gpio_pin * 2) 20 #define MODE_BITS_MASK 3 21 #define BSRR_BIT(gpio_pin, value) BIT(gpio_pin + (value ? 0 : 16)) 22 23 static int stm32_gpio_direction_input(struct udevice *dev, unsigned offset) 24 { 25 struct stm32_gpio_priv *priv = dev_get_priv(dev); 26 struct stm32_gpio_regs *regs = priv->regs; 27 int bits_index = MODE_BITS(offset); 28 int mask = MODE_BITS_MASK << bits_index; 29 30 clrsetbits_le32(®s->moder, mask, STM32_GPIO_MODE_IN << bits_index); 31 32 return 0; 33 } 34 35 static int stm32_gpio_direction_output(struct udevice *dev, unsigned offset, 36 int value) 37 { 38 struct stm32_gpio_priv *priv = dev_get_priv(dev); 39 struct stm32_gpio_regs *regs = priv->regs; 40 int bits_index = MODE_BITS(offset); 41 int mask = MODE_BITS_MASK << bits_index; 42 43 clrsetbits_le32(®s->moder, mask, STM32_GPIO_MODE_OUT << bits_index); 44 45 writel(BSRR_BIT(offset, value), ®s->bsrr); 46 47 return 0; 48 } 49 50 static int stm32_gpio_get_value(struct udevice *dev, unsigned offset) 51 { 52 struct stm32_gpio_priv *priv = dev_get_priv(dev); 53 struct stm32_gpio_regs *regs = priv->regs; 54 55 return readl(®s->idr) & BIT(offset) ? 1 : 0; 56 } 57 58 static int stm32_gpio_set_value(struct udevice *dev, unsigned offset, int value) 59 { 60 struct stm32_gpio_priv *priv = dev_get_priv(dev); 61 struct stm32_gpio_regs *regs = priv->regs; 62 63 writel(BSRR_BIT(offset, value), ®s->bsrr); 64 65 return 0; 66 } 67 68 static int stm32_gpio_get_function(struct udevice *dev, unsigned int offset) 69 { 70 struct stm32_gpio_priv *priv = dev_get_priv(dev); 71 struct stm32_gpio_regs *regs = priv->regs; 72 int bits_index = MODE_BITS(offset); 73 int mask = MODE_BITS_MASK << bits_index; 74 u32 mode; 75 76 mode = (readl(®s->moder) & mask) >> bits_index; 77 if (mode == STM32_GPIO_MODE_OUT) 78 return GPIOF_OUTPUT; 79 if (mode == STM32_GPIO_MODE_IN) 80 return GPIOF_INPUT; 81 if (mode == STM32_GPIO_MODE_AN) 82 return GPIOF_UNUSED; 83 84 return GPIOF_FUNC; 85 } 86 87 static const struct dm_gpio_ops gpio_stm32_ops = { 88 .direction_input = stm32_gpio_direction_input, 89 .direction_output = stm32_gpio_direction_output, 90 .get_value = stm32_gpio_get_value, 91 .set_value = stm32_gpio_set_value, 92 .get_function = stm32_gpio_get_function, 93 }; 94 95 static int gpio_stm32_probe(struct udevice *dev) 96 { 97 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); 98 struct stm32_gpio_priv *priv = dev_get_priv(dev); 99 fdt_addr_t addr; 100 const char *name; 101 102 addr = dev_read_addr(dev); 103 if (addr == FDT_ADDR_T_NONE) 104 return -EINVAL; 105 106 priv->regs = (struct stm32_gpio_regs *)addr; 107 name = dev_read_string(dev, "st,bank-name"); 108 if (!name) 109 return -EINVAL; 110 uc_priv->bank_name = name; 111 uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios", 112 STM32_GPIOS_PER_BANK); 113 debug("%s, addr = 0x%p, bank_name = %s\n", __func__, (u32 *)priv->regs, 114 uc_priv->bank_name); 115 116 #ifdef CONFIG_CLK 117 struct clk clk; 118 int ret; 119 ret = clk_get_by_index(dev, 0, &clk); 120 if (ret < 0) 121 return ret; 122 123 ret = clk_enable(&clk); 124 125 if (ret) { 126 dev_err(dev, "failed to enable clock\n"); 127 return ret; 128 } 129 debug("clock enabled for device %s\n", dev->name); 130 #endif 131 132 return 0; 133 } 134 135 static const struct udevice_id stm32_gpio_ids[] = { 136 { .compatible = "st,stm32-gpio" }, 137 { } 138 }; 139 140 U_BOOT_DRIVER(gpio_stm32) = { 141 .name = "gpio_stm32", 142 .id = UCLASS_GPIO, 143 .of_match = stm32_gpio_ids, 144 .probe = gpio_stm32_probe, 145 .ops = &gpio_stm32_ops, 146 .flags = DM_UC_FLAG_SEQ_ALIAS, 147 .priv_auto_alloc_size = sizeof(struct stm32_gpio_priv), 148 }; 149