1 /* 2 * Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference. 3 * 4 * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 * 8 */ 9 10 /* 11 * Note: 12 * The driver's compatible table is borrowed from Linux Kernel, 13 * but now max supported gpio pins is 24 and only PCA953X_TYPE 14 * is supported. PCA957X_TYPE is not supported now. 15 * Also the Polarity Inversion feature is not supported now. 16 * 17 * TODO: 18 * 1. Support PCA957X_TYPE 19 * 2. Support max 40 gpio pins 20 * 3. Support Plolarity Inversion 21 */ 22 23 #include <common.h> 24 #include <errno.h> 25 #include <dm.h> 26 #include <fdtdec.h> 27 #include <i2c.h> 28 #include <malloc.h> 29 #include <asm/gpio.h> 30 #include <asm/io.h> 31 #include <dt-bindings/gpio/gpio.h> 32 33 #define PCA953X_INPUT 0 34 #define PCA953X_OUTPUT 1 35 #define PCA953X_INVERT 2 36 #define PCA953X_DIRECTION 3 37 38 #define PCA_GPIO_MASK 0x00FF 39 #define PCA_INT 0x0100 40 #define PCA953X_TYPE 0x1000 41 #define PCA957X_TYPE 0x2000 42 #define PCA_TYPE_MASK 0xF000 43 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 44 45 enum { 46 PCA953X_DIRECTION_IN, 47 PCA953X_DIRECTION_OUT, 48 }; 49 50 #define MAX_BANK 3 51 #define BANK_SZ 8 52 53 DECLARE_GLOBAL_DATA_PTR; 54 55 /* 56 * struct pca953x_info - Data for pca953x 57 * 58 * @dev: udevice structure for the device 59 * @addr: i2c slave address 60 * @invert: Polarity inversion or not 61 * @gpio_count: the number of gpio pins that the device supports 62 * @chip_type: indicate the chip type,PCA953X or PCA957X 63 * @bank_count: the number of banks that the device supports 64 * @reg_output: array to hold the value of output registers 65 * @reg_direction: array to hold the value of direction registers 66 */ 67 struct pca953x_info { 68 struct udevice *dev; 69 int addr; 70 int invert; 71 int gpio_count; 72 int chip_type; 73 int bank_count; 74 u8 reg_output[MAX_BANK]; 75 u8 reg_direction[MAX_BANK]; 76 }; 77 78 static int pca953x_write_single(struct udevice *dev, int reg, u8 val, 79 int offset) 80 { 81 struct pca953x_info *info = dev_get_platdata(dev); 82 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); 83 int off = offset / BANK_SZ; 84 int ret = 0; 85 86 ret = dm_i2c_write(dev, (reg << bank_shift) + off, &val, 1); 87 if (ret) { 88 dev_err(dev, "%s error\n", __func__); 89 return ret; 90 } 91 92 return 0; 93 } 94 95 static int pca953x_read_single(struct udevice *dev, int reg, u8 *val, 96 int offset) 97 { 98 struct pca953x_info *info = dev_get_platdata(dev); 99 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); 100 int off = offset / BANK_SZ; 101 int ret; 102 u8 byte; 103 104 ret = dm_i2c_read(dev, (reg << bank_shift) + off, &byte, 1); 105 if (ret) { 106 dev_err(dev, "%s error\n", __func__); 107 return ret; 108 } 109 110 *val = byte; 111 112 return 0; 113 } 114 115 static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val) 116 { 117 struct pca953x_info *info = dev_get_platdata(dev); 118 int ret = 0; 119 120 if (info->gpio_count <= 8) { 121 ret = dm_i2c_read(dev, reg, val, 1); 122 } else if (info->gpio_count <= 16) { 123 ret = dm_i2c_read(dev, reg << 1, val, info->bank_count); 124 } else { 125 dev_err(dev, "Unsupported now\n"); 126 return -EINVAL; 127 } 128 129 return ret; 130 } 131 132 static int pca953x_is_output(struct udevice *dev, int offset) 133 { 134 struct pca953x_info *info = dev_get_platdata(dev); 135 136 int bank = offset / BANK_SZ; 137 int off = offset % BANK_SZ; 138 139 /*0: output; 1: input */ 140 return !(info->reg_direction[bank] & (1 << off)); 141 } 142 143 static int pca953x_get_value(struct udevice *dev, unsigned offset) 144 { 145 int ret; 146 u8 val = 0; 147 148 ret = pca953x_read_single(dev, PCA953X_INPUT, &val, offset); 149 if (ret) 150 return ret; 151 152 return (val >> offset) & 0x1; 153 } 154 155 static int pca953x_set_value(struct udevice *dev, unsigned offset, 156 int value) 157 { 158 struct pca953x_info *info = dev_get_platdata(dev); 159 int bank = offset / BANK_SZ; 160 int off = offset % BANK_SZ; 161 u8 val; 162 int ret; 163 164 if (value) 165 val = info->reg_output[bank] | (1 << off); 166 else 167 val = info->reg_output[bank] & ~(1 << off); 168 169 ret = pca953x_write_single(dev, PCA953X_OUTPUT, val, offset); 170 if (ret) 171 return ret; 172 173 info->reg_output[bank] = val; 174 175 return 0; 176 } 177 178 static int pca953x_set_direction(struct udevice *dev, unsigned offset, int dir) 179 { 180 struct pca953x_info *info = dev_get_platdata(dev); 181 int bank = offset / BANK_SZ; 182 int off = offset % BANK_SZ; 183 u8 val; 184 int ret; 185 186 if (dir == PCA953X_DIRECTION_IN) 187 val = info->reg_direction[bank] | (1 << off); 188 else 189 val = info->reg_direction[bank] & ~(1 << off); 190 191 ret = pca953x_write_single(dev, PCA953X_DIRECTION, val, offset); 192 if (ret) 193 return ret; 194 195 info->reg_direction[bank] = val; 196 197 return 0; 198 } 199 200 static int pca953x_direction_input(struct udevice *dev, unsigned offset) 201 { 202 return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN); 203 } 204 205 static int pca953x_direction_output(struct udevice *dev, unsigned offset, 206 int value) 207 { 208 /* Configure output value. */ 209 pca953x_set_value(dev, offset, value); 210 211 /* Configure direction as output. */ 212 pca953x_set_direction(dev, offset, PCA953X_DIRECTION_OUT); 213 214 return 0; 215 } 216 217 static int pca953x_get_function(struct udevice *dev, unsigned offset) 218 { 219 if (pca953x_is_output(dev, offset)) 220 return GPIOF_OUTPUT; 221 else 222 return GPIOF_INPUT; 223 } 224 225 static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc, 226 struct fdtdec_phandle_args *args) 227 { 228 desc->offset = args->args[0]; 229 desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0; 230 231 return 0; 232 } 233 234 static const struct dm_gpio_ops pca953x_ops = { 235 .direction_input = pca953x_direction_input, 236 .direction_output = pca953x_direction_output, 237 .get_value = pca953x_get_value, 238 .set_value = pca953x_set_value, 239 .get_function = pca953x_get_function, 240 .xlate = pca953x_xlate, 241 }; 242 243 static int pca953x_probe(struct udevice *dev) 244 { 245 struct pca953x_info *info = dev_get_platdata(dev); 246 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); 247 struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); 248 char name[32], *str; 249 int addr; 250 ulong driver_data; 251 int ret; 252 253 if (!info) { 254 dev_err(dev, "platdata not ready\n"); 255 return -ENOMEM; 256 } 257 258 if (!chip) { 259 dev_err(dev, "i2c not ready\n"); 260 return -ENODEV; 261 } 262 263 addr = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", 0); 264 if (addr == 0) 265 return -ENODEV; 266 267 info->addr = addr; 268 269 driver_data = dev_get_driver_data(dev); 270 271 info->gpio_count = driver_data & PCA_GPIO_MASK; 272 if (info->gpio_count > MAX_BANK * BANK_SZ) { 273 dev_err(dev, "Max support %d pins now\n", MAX_BANK * BANK_SZ); 274 return -EINVAL; 275 } 276 277 info->chip_type = PCA_CHIP_TYPE(driver_data); 278 if (info->chip_type != PCA953X_TYPE) { 279 dev_err(dev, "Only support PCA953X chip type now.\n"); 280 return -EINVAL; 281 } 282 283 info->bank_count = DIV_ROUND_UP(info->gpio_count, BANK_SZ); 284 285 ret = pca953x_read_regs(dev, PCA953X_OUTPUT, info->reg_output); 286 if (ret) { 287 dev_err(dev, "Error reading output register\n"); 288 return ret; 289 } 290 291 ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction); 292 if (ret) { 293 dev_err(dev, "Error reading direction register\n"); 294 return ret; 295 } 296 297 snprintf(name, sizeof(name), "gpio@%x_", info->addr); 298 str = strdup(name); 299 if (!str) 300 return -ENOMEM; 301 uc_priv->bank_name = str; 302 uc_priv->gpio_count = info->gpio_count; 303 304 dev_dbg(dev, "%s is ready\n", str); 305 306 return 0; 307 } 308 309 #define OF_953X(__nrgpio, __int) (ulong)(__nrgpio | PCA953X_TYPE | __int) 310 #define OF_957X(__nrgpio, __int) (ulong)(__nrgpio | PCA957X_TYPE | __int) 311 312 static const struct udevice_id pca953x_ids[] = { 313 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 314 { .compatible = "nxp,pca9534", .data = OF_953X(8, PCA_INT), }, 315 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 316 { .compatible = "nxp,pca9536", .data = OF_953X(4, 0), }, 317 { .compatible = "nxp,pca9537", .data = OF_953X(4, PCA_INT), }, 318 { .compatible = "nxp,pca9538", .data = OF_953X(8, PCA_INT), }, 319 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 320 { .compatible = "nxp,pca9554", .data = OF_953X(8, PCA_INT), }, 321 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 322 { .compatible = "nxp,pca9556", .data = OF_953X(8, 0), }, 323 { .compatible = "nxp,pca9557", .data = OF_953X(8, 0), }, 324 { .compatible = "nxp,pca9574", .data = OF_957X(8, PCA_INT), }, 325 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 326 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 327 328 { .compatible = "maxim,max7310", .data = OF_953X(8, 0), }, 329 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 330 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 331 { .compatible = "maxim,max7315", .data = OF_953X(8, PCA_INT), }, 332 333 { .compatible = "ti,pca6107", .data = OF_953X(8, PCA_INT), }, 334 { .compatible = "ti,tca6408", .data = OF_953X(8, PCA_INT), }, 335 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 336 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 337 338 { .compatible = "onsemi,pca9654", .data = OF_953X(8, PCA_INT), }, 339 340 { .compatible = "exar,xra1202", .data = OF_953X(8, 0), }, 341 { } 342 }; 343 344 U_BOOT_DRIVER(pca953x) = { 345 .name = "pca953x", 346 .id = UCLASS_GPIO, 347 .ops = &pca953x_ops, 348 .probe = pca953x_probe, 349 .platdata_auto_alloc_size = sizeof(struct pca953x_info), 350 .of_match = pca953x_ids, 351 }; 352