1 /* 2 * Synopsys HSDK SDP Generic PLL clock driver 3 * 4 * Copyright (C) 2017 Synopsys 5 * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> 6 * 7 * This file is licensed under the terms of the GNU General Public 8 * License version 2. This program is licensed "as is" without any 9 * warranty of any kind, whether express or implied. 10 */ 11 12 #include <asm-generic/gpio.h> 13 #include <asm/io.h> 14 #include <common.h> 15 #include <dm.h> 16 #include <errno.h> 17 #include <linux/printk.h> 18 19 #define HSDK_CREG_MAX_GPIO 8 20 21 #define GPIO_ACTIVATE 0x2 22 #define GPIO_DEACTIVATE 0x3 23 #define GPIO_PIN_MASK 0x3 24 #define BIT_PER_GPIO 2 25 26 struct hsdk_creg_gpio { 27 uint32_t *regs; 28 }; 29 30 static int hsdk_creg_gpio_set_value(struct udevice *dev, unsigned oft, int val) 31 { 32 struct hsdk_creg_gpio *hcg = dev_get_priv(dev); 33 uint32_t reg = readl(hcg->regs); 34 uint32_t cmd = val ? GPIO_DEACTIVATE : GPIO_ACTIVATE; 35 36 reg &= ~(GPIO_PIN_MASK << (oft * BIT_PER_GPIO)); 37 reg |= (cmd << (oft * BIT_PER_GPIO)); 38 39 writel(reg, hcg->regs); 40 41 return 0; 42 } 43 44 static int hsdk_creg_gpio_direction_output(struct udevice *dev, unsigned oft, 45 int val) 46 { 47 hsdk_creg_gpio_set_value(dev, oft, val); 48 49 return 0; 50 } 51 52 static int hsdk_creg_gpio_direction_input(struct udevice *dev, unsigned oft) 53 { 54 pr_err("hsdk-creg-gpio can't be used as input!\n"); 55 56 return -ENOTSUPP; 57 } 58 59 static int hsdk_creg_gpio_get_value(struct udevice *dev, unsigned int oft) 60 { 61 struct hsdk_creg_gpio *hcg = dev_get_priv(dev); 62 uint32_t val = readl(hcg->regs); 63 64 val = (val >> (oft * BIT_PER_GPIO)) & GPIO_PIN_MASK; 65 return (val == GPIO_DEACTIVATE) ? 1 : 0; 66 } 67 68 static const struct dm_gpio_ops hsdk_creg_gpio_ops = { 69 .direction_output = hsdk_creg_gpio_direction_output, 70 .direction_input = hsdk_creg_gpio_direction_input, 71 .set_value = hsdk_creg_gpio_set_value, 72 .get_value = hsdk_creg_gpio_get_value, 73 }; 74 75 static int hsdk_creg_gpio_probe(struct udevice *dev) 76 { 77 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); 78 struct hsdk_creg_gpio *hcg = dev_get_priv(dev); 79 80 hcg->regs = (uint32_t *)devfdt_get_addr_ptr(dev); 81 82 uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 1); 83 if (uc_priv->gpio_count > HSDK_CREG_MAX_GPIO) 84 uc_priv->gpio_count = HSDK_CREG_MAX_GPIO; 85 86 uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); 87 if (!uc_priv->bank_name) 88 uc_priv->bank_name = dev_read_name(dev); 89 90 pr_debug("%s GPIO [0x%p] controller with %d gpios probed\n", 91 uc_priv->bank_name, hcg->regs, uc_priv->gpio_count); 92 93 return 0; 94 } 95 96 static const struct udevice_id hsdk_creg_gpio_ids[] = { 97 { .compatible = "snps,hsdk-creg-gpio" }, 98 { } 99 }; 100 101 U_BOOT_DRIVER(gpio_hsdk_creg) = { 102 .name = "gpio_hsdk_creg", 103 .id = UCLASS_GPIO, 104 .ops = &hsdk_creg_gpio_ops, 105 .probe = hsdk_creg_gpio_probe, 106 .of_match = hsdk_creg_gpio_ids, 107 .platdata_auto_alloc_size = sizeof(struct hsdk_creg_gpio), 108 }; 109