1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2015 Marek Vasut <marex@denx.de> 4 * 5 * DesignWare APB GPIO driver 6 */ 7 8 #include <common.h> 9 #include <malloc.h> 10 #include <asm/arch/gpio.h> 11 #include <asm/gpio.h> 12 #include <asm/io.h> 13 #include <dm.h> 14 #include <dm/device-internal.h> 15 #include <dm/lists.h> 16 #include <dm/root.h> 17 #include <errno.h> 18 19 DECLARE_GLOBAL_DATA_PTR; 20 21 #define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc) 22 #define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc) 23 #define GPIO_INTEN 0x30 24 #define GPIO_INTMASK 0x34 25 #define GPIO_INTTYPE_LEVEL 0x38 26 #define GPIO_INT_POLARITY 0x3c 27 #define GPIO_INTSTATUS 0x40 28 #define GPIO_PORTA_DEBOUNCE 0x48 29 #define GPIO_PORTA_EOI 0x4c 30 #define GPIO_EXT_PORT(p) (0x50 + (p) * 4) 31 32 struct gpio_dwapb_platdata { 33 const char *name; 34 int bank; 35 int pins; 36 fdt_addr_t base; 37 }; 38 39 static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin) 40 { 41 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); 42 43 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); 44 return 0; 45 } 46 47 static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin, 48 int val) 49 { 50 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); 51 52 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); 53 54 if (val) 55 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); 56 else 57 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); 58 59 return 0; 60 } 61 62 static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin) 63 { 64 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); 65 return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin)); 66 } 67 68 69 static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val) 70 { 71 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); 72 73 if (val) 74 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); 75 else 76 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); 77 78 return 0; 79 } 80 81 static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset) 82 { 83 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); 84 u32 gpio; 85 86 gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank)); 87 88 if (gpio & BIT(offset)) 89 return GPIOF_OUTPUT; 90 else 91 return GPIOF_INPUT; 92 } 93 94 static const struct dm_gpio_ops gpio_dwapb_ops = { 95 .direction_input = dwapb_gpio_direction_input, 96 .direction_output = dwapb_gpio_direction_output, 97 .get_value = dwapb_gpio_get_value, 98 .set_value = dwapb_gpio_set_value, 99 .get_function = dwapb_gpio_get_function, 100 }; 101 102 static int gpio_dwapb_probe(struct udevice *dev) 103 { 104 struct gpio_dev_priv *priv = dev_get_uclass_priv(dev); 105 struct gpio_dwapb_platdata *plat = dev->platdata; 106 107 if (!plat) 108 return 0; 109 110 priv->gpio_count = plat->pins; 111 priv->bank_name = plat->name; 112 113 return 0; 114 } 115 116 static int gpio_dwapb_bind(struct udevice *dev) 117 { 118 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); 119 const void *blob = gd->fdt_blob; 120 struct udevice *subdev; 121 fdt_addr_t base; 122 int ret, node, bank = 0; 123 124 /* If this is a child device, there is nothing to do here */ 125 if (plat) 126 return 0; 127 128 base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg"); 129 if (base == FDT_ADDR_T_NONE) { 130 debug("Can't get the GPIO register base address\n"); 131 return -ENXIO; 132 } 133 134 for (node = fdt_first_subnode(blob, dev_of_offset(dev)); 135 node > 0; 136 node = fdt_next_subnode(blob, node)) { 137 if (!fdtdec_get_bool(blob, node, "gpio-controller")) 138 continue; 139 140 plat = NULL; 141 plat = calloc(1, sizeof(*plat)); 142 if (!plat) 143 return -ENOMEM; 144 145 plat->base = base; 146 plat->bank = bank; 147 plat->pins = fdtdec_get_int(blob, node, "snps,nr-gpios", 0); 148 plat->name = fdt_stringlist_get(blob, node, "bank-name", 0, 149 NULL); 150 if (ret) 151 goto err; 152 153 ret = device_bind(dev, dev->driver, plat->name, 154 plat, -1, &subdev); 155 if (ret) 156 goto err; 157 158 dev_set_of_offset(subdev, node); 159 bank++; 160 } 161 162 return 0; 163 164 err: 165 free(plat); 166 return ret; 167 } 168 169 static const struct udevice_id gpio_dwapb_ids[] = { 170 { .compatible = "snps,dw-apb-gpio" }, 171 { } 172 }; 173 174 U_BOOT_DRIVER(gpio_dwapb) = { 175 .name = "gpio-dwapb", 176 .id = UCLASS_GPIO, 177 .of_match = gpio_dwapb_ids, 178 .ops = &gpio_dwapb_ops, 179 .bind = gpio_dwapb_bind, 180 .probe = gpio_dwapb_probe, 181 }; 182