1 /* 2 * Copyright (C) 2012 Vikram Narayananan 3 * <vikram186@gmail.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <asm/gpio.h> 12 #include <asm/io.h> 13 14 struct bcm2835_gpios { 15 struct bcm2835_gpio_regs *reg; 16 }; 17 18 static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio) 19 { 20 struct bcm2835_gpios *gpios = dev_get_priv(dev); 21 unsigned val; 22 23 val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 24 val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio)); 25 val |= (BCM2835_GPIO_INPUT << BCM2835_GPIO_FSEL_SHIFT(gpio)); 26 writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 27 28 return 0; 29 } 30 31 static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio, 32 int value) 33 { 34 struct bcm2835_gpios *gpios = dev_get_priv(dev); 35 unsigned val; 36 37 gpio_set_value(gpio, value); 38 39 val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 40 val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio)); 41 val |= (BCM2835_GPIO_OUTPUT << BCM2835_GPIO_FSEL_SHIFT(gpio)); 42 writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 43 44 return 0; 45 } 46 47 static bool bcm2835_gpio_is_output(const struct bcm2835_gpios *gpios, int gpio) 48 { 49 u32 val; 50 51 val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 52 val &= BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio); 53 return val ? true : false; 54 } 55 56 static int bcm2835_get_value(const struct bcm2835_gpios *gpios, unsigned gpio) 57 { 58 unsigned val; 59 60 val = readl(&gpios->reg->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]); 61 62 return (val >> BCM2835_GPIO_COMMON_SHIFT(gpio)) & 0x1; 63 } 64 65 static int bcm2835_gpio_get_value(struct udevice *dev, unsigned gpio) 66 { 67 const struct bcm2835_gpios *gpios = dev_get_priv(dev); 68 69 return bcm2835_get_value(gpios, gpio); 70 } 71 72 static int bcm2835_gpio_set_value(struct udevice *dev, unsigned gpio, 73 int value) 74 { 75 struct bcm2835_gpios *gpios = dev_get_priv(dev); 76 u32 *output_reg = value ? gpios->reg->gpset : gpios->reg->gpclr; 77 78 writel(1 << BCM2835_GPIO_COMMON_SHIFT(gpio), 79 &output_reg[BCM2835_GPIO_COMMON_BANK(gpio)]); 80 81 return 0; 82 } 83 84 static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset) 85 { 86 struct bcm2835_gpios *gpios = dev_get_priv(dev); 87 88 /* GPIOF_FUNC is not implemented yet */ 89 if (bcm2835_gpio_is_output(gpios, offset)) 90 return GPIOF_OUTPUT; 91 else 92 return GPIOF_INPUT; 93 } 94 95 96 static const struct dm_gpio_ops gpio_bcm2835_ops = { 97 .direction_input = bcm2835_gpio_direction_input, 98 .direction_output = bcm2835_gpio_direction_output, 99 .get_value = bcm2835_gpio_get_value, 100 .set_value = bcm2835_gpio_set_value, 101 .get_function = bcm2835_gpio_get_function, 102 }; 103 104 static int bcm2835_gpio_probe(struct udevice *dev) 105 { 106 struct bcm2835_gpios *gpios = dev_get_priv(dev); 107 struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev); 108 struct gpio_dev_priv *uc_priv = dev->uclass_priv; 109 110 uc_priv->bank_name = "GPIO"; 111 uc_priv->gpio_count = BCM2835_GPIO_COUNT; 112 gpios->reg = (struct bcm2835_gpio_regs *)plat->base; 113 114 return 0; 115 } 116 117 U_BOOT_DRIVER(gpio_bcm2835) = { 118 .name = "gpio_bcm2835", 119 .id = UCLASS_GPIO, 120 .ops = &gpio_bcm2835_ops, 121 .probe = bcm2835_gpio_probe, 122 .priv_auto_alloc_size = sizeof(struct bcm2835_gpios), 123 }; 124