1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2012 Vikram Narayananan 4 * <vikram186@gmail.com> 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <dm/pinctrl.h> 10 #include <errno.h> 11 #include <asm/gpio.h> 12 #include <asm/io.h> 13 #include <fdtdec.h> 14 15 struct bcm2835_gpios { 16 struct bcm2835_gpio_regs *reg; 17 struct udevice *pinctrl; 18 }; 19 20 static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio) 21 { 22 struct bcm2835_gpios *gpios = dev_get_priv(dev); 23 unsigned val; 24 25 val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 26 val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio)); 27 val |= (BCM2835_GPIO_INPUT << BCM2835_GPIO_FSEL_SHIFT(gpio)); 28 writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 29 30 return 0; 31 } 32 33 static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned int gpio, 34 int value) 35 { 36 struct bcm2835_gpios *gpios = dev_get_priv(dev); 37 unsigned val; 38 39 gpio_set_value(gpio, value); 40 41 val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 42 val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio)); 43 val |= (BCM2835_GPIO_OUTPUT << BCM2835_GPIO_FSEL_SHIFT(gpio)); 44 writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); 45 46 return 0; 47 } 48 49 static int bcm2835_get_value(const struct bcm2835_gpios *gpios, unsigned gpio) 50 { 51 unsigned val; 52 53 val = readl(&gpios->reg->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]); 54 55 return (val >> BCM2835_GPIO_COMMON_SHIFT(gpio)) & 0x1; 56 } 57 58 static int bcm2835_gpio_get_value(struct udevice *dev, unsigned gpio) 59 { 60 const struct bcm2835_gpios *gpios = dev_get_priv(dev); 61 62 return bcm2835_get_value(gpios, gpio); 63 } 64 65 static int bcm2835_gpio_set_value(struct udevice *dev, unsigned gpio, 66 int value) 67 { 68 struct bcm2835_gpios *gpios = dev_get_priv(dev); 69 u32 *output_reg = value ? gpios->reg->gpset : gpios->reg->gpclr; 70 71 writel(1 << BCM2835_GPIO_COMMON_SHIFT(gpio), 72 &output_reg[BCM2835_GPIO_COMMON_BANK(gpio)]); 73 74 return 0; 75 } 76 77 static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset) 78 { 79 struct bcm2835_gpios *priv = dev_get_priv(dev); 80 int funcid; 81 82 funcid = pinctrl_get_gpio_mux(priv->pinctrl, 0, offset); 83 84 switch (funcid) { 85 case BCM2835_GPIO_OUTPUT: 86 return GPIOF_OUTPUT; 87 case BCM2835_GPIO_INPUT: 88 return GPIOF_INPUT; 89 default: 90 return GPIOF_FUNC; 91 } 92 } 93 94 static const struct dm_gpio_ops gpio_bcm2835_ops = { 95 .direction_input = bcm2835_gpio_direction_input, 96 .direction_output = bcm2835_gpio_direction_output, 97 .get_value = bcm2835_gpio_get_value, 98 .set_value = bcm2835_gpio_set_value, 99 .get_function = bcm2835_gpio_get_function, 100 }; 101 102 static int bcm2835_gpio_probe(struct udevice *dev) 103 { 104 struct bcm2835_gpios *gpios = dev_get_priv(dev); 105 struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev); 106 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); 107 108 uc_priv->bank_name = "GPIO"; 109 uc_priv->gpio_count = BCM2835_GPIO_COUNT; 110 gpios->reg = (struct bcm2835_gpio_regs *)plat->base; 111 112 /* We know we're spawned by the pinctrl driver */ 113 gpios->pinctrl = dev->parent; 114 115 return 0; 116 } 117 118 #if CONFIG_IS_ENABLED(OF_CONTROL) 119 static int bcm2835_gpio_ofdata_to_platdata(struct udevice *dev) 120 { 121 struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev); 122 fdt_addr_t addr; 123 124 addr = devfdt_get_addr(dev); 125 if (addr == FDT_ADDR_T_NONE) 126 return -EINVAL; 127 128 plat->base = addr; 129 return 0; 130 } 131 #endif 132 133 U_BOOT_DRIVER(gpio_bcm2835) = { 134 .name = "gpio_bcm2835", 135 .id = UCLASS_GPIO, 136 .ofdata_to_platdata = of_match_ptr(bcm2835_gpio_ofdata_to_platdata), 137 .platdata_auto_alloc_size = sizeof(struct bcm2835_gpio_platdata), 138 .ops = &gpio_bcm2835_ops, 139 .probe = bcm2835_gpio_probe, 140 .flags = DM_FLAG_PRE_RELOC, 141 .priv_auto_alloc_size = sizeof(struct bcm2835_gpios), 142 }; 143