xref: /openbmc/u-boot/drivers/gpio/Kconfig (revision 94db5120) 
1#
2# GPIO infrastructure and drivers
3#
4
5menu "GPIO Support"
6
7config DM_GPIO
8	bool "Enable Driver Model for GPIO drivers"
9	depends on DM
10	help
11	  Enable driver model for GPIO access. The standard GPIO
12	  interface (gpio_get_value(), etc.) is then implemented by
13	  the GPIO uclass. Drivers provide methods to query the
14	  particular GPIOs that they provide. The uclass interface
15	  is defined in include/asm-generic/gpio.h.
16
17config ALTERA_PIO
18	bool "Altera PIO driver"
19	depends on DM_GPIO
20	help
21	  Select this to enable PIO for Altera devices. Please find
22	  details on the "Embedded Peripherals IP User Guide" of Altera.
23
24config BCM6345_GPIO
25	bool "BCM6345 GPIO driver"
26	depends on DM_GPIO && ARCH_BMIPS
27	help
28	  This driver supports the GPIO banks on BCM6345 SoCs.
29
30config DWAPB_GPIO
31	bool "DWAPB GPIO driver"
32	depends on DM && DM_GPIO
33	default n
34	help
35	  Support for the Designware APB GPIO driver.
36
37config AT91_GPIO
38	bool "AT91 PIO GPIO driver"
39	depends on DM_GPIO
40	default n
41	help
42	  Say yes here to select AT91 PIO GPIO driver. AT91 PIO
43	  controller manages up to 32 fully programmable input/output
44	  lines. Each I/O line may be dedicated as a general-purpose
45	  I/O or be assigned to a function of an embedded peripheral.
46	  The assignment to a function of an embedded peripheral is
47	  the responsibility of AT91 Pinctrl driver. This driver is
48	  responsible for the general-purpose I/O.
49
50config ATMEL_PIO4
51	bool "ATMEL PIO4 driver"
52	depends on DM_GPIO
53	default n
54	help
55	  Say yes here to support the Atmel PIO4 driver.
56	  The PIO4 is new version of Atmel PIO controller, which manages
57	  up to 128 fully programmable input/output lines. Each I/O line
58	  may be dedicated as a general purpose I/O or be assigned to
59	  a function of an embedded peripheral.
60
61config INTEL_BROADWELL_GPIO
62	bool "Intel Broadwell GPIO driver"
63	depends on DM
64	help
65	  This driver supports Broadwell U devices which have an expanded
66	  GPIO feature set. The difference is large enough to merit a separate
67	  driver from the common Intel ICH6 driver. It supports a total of
68	  95 GPIOs which can be configured from the device tree.
69
70config INTEL_ICH6_GPIO
71	bool "Intel ICH6 compatible legacy GPIO driver"
72	depends on DM_GPIO
73	help
74	  Say yes here to select Intel ICH6 compatible legacy GPIO driver.
75
76config IMX_RGPIO2P
77	bool "i.MX7ULP RGPIO2P driver"
78	depends on DM
79	default n
80	help
81	  This driver supports i.MX7ULP Rapid GPIO2P controller.
82
83config LPC32XX_GPIO
84	bool "LPC32XX GPIO driver"
85	depends on DM
86	default n
87	help
88	  Support for the LPC32XX GPIO driver.
89
90config MSM_GPIO
91	bool "Qualcomm GPIO driver"
92	depends on DM_GPIO
93	default n
94	help
95	  Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
96	  This controller have single bank (default name "soc"), every
97	  gpio has it's own set of registers.
98	  Only simple GPIO operations are supported (get/set, change of
99	  direction and checking pin function).
100	  Supported devices:
101	  - APQ8016
102	  - MSM8916
103
104config OMAP_GPIO
105	bool "TI OMAP GPIO driver"
106	depends on ARCH_OMAP2PLUS
107	default y
108	help
109	  Support GPIO controllers on the TI OMAP3/4/5 and related (such as
110	  AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs.
111
112config PM8916_GPIO
113	bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
114	depends on DM_GPIO && PMIC_PM8916
115	help
116	  Support for GPIO pins and power/reset buttons found on
117	  Qualcomm PM8916 PMIC.
118	  Default name for GPIO bank is "pm8916".
119	  Power and reset buttons are placed in "pm8916_key" bank and
120          have gpio numbers 0 and 1 respectively.
121
122config PCF8575_GPIO
123	bool "PCF8575 I2C GPIO Expander driver"
124	depends on DM_GPIO && DM_I2C
125	help
126	 Support for PCF8575 I2C 16-bit GPIO expander. Most of these
127	 chips are from NXP and TI.
128
129config ROCKCHIP_GPIO
130	bool "Rockchip GPIO driver"
131	depends on DM_GPIO
132	help
133	  Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
134	  a number of banks (different for each SoC type) each with 32 GPIOs.
135	  The GPIOs for a device are defined in the device tree with one node
136	  for each bank.
137
138config SANDBOX_GPIO
139	bool "Enable sandbox GPIO driver"
140	depends on SANDBOX && DM && DM_GPIO
141	help
142	  This driver supports some simulated GPIOs which can be adjusted
143	  using 'back door' functions like sandbox_gpio_set_value(). Then the
144	  GPIOs can be inspected through the normal get_get_value()
145	  interface. The purpose of this is to allow GPIOs to be used as
146	  normal in sandbox, perhaps with test code actually driving the
147	  behaviour of those GPIOs.
148
149config SANDBOX_GPIO_COUNT
150	int "Number of sandbox GPIOs"
151	depends on SANDBOX_GPIO
152	default 128
153	help
154	  The sandbox driver can support any number of GPIOs. Generally these
155	  are specified using the device tree. But you can also have a number
156	  of 'anonymous' GPIOs that do not belong to any device or bank.
157	  Select a suitable value depending on your needs.
158
159config TEGRA_GPIO
160	bool "Tegra20..210 GPIO driver"
161	depends on DM_GPIO
162	help
163	  Support for the GPIO controller contained in NVIDIA Tegra20 through
164	  Tegra210.
165
166config TEGRA186_GPIO
167	bool "Tegra186 GPIO driver"
168	depends on DM_GPIO
169	help
170	  Support for the GPIO controller contained in NVIDIA Tegra186. This
171	  covers both the "main" and "AON" controller instances, even though
172	  they have slightly different register layout.
173
174config GPIO_UNIPHIER
175	bool "UniPhier GPIO"
176	depends on ARCH_UNIPHIER
177	help
178	  Say yes here to support UniPhier GPIOs.
179
180config VYBRID_GPIO
181	bool "Vybrid GPIO driver"
182	depends on DM
183	default n
184	help
185	  Say yes here to support Vybrid vf610 GPIOs.
186
187config PIC32_GPIO
188	bool "Microchip PIC32 GPIO driver"
189	depends on DM_GPIO && MACH_PIC32
190	default y
191	help
192	  Say yes here to support Microchip PIC32 GPIOs.
193
194config STM32F7_GPIO
195	bool "ST STM32 GPIO driver"
196	depends on DM_GPIO && STM32
197	default y
198	help
199	  Device model driver support for STM32 GPIO controller. It should be
200	  usable on many stm32 families like stm32f4 & stm32H7.
201	  Tested on STM32F7.
202
203config MVEBU_GPIO
204	bool "Marvell MVEBU GPIO driver"
205	depends on DM_GPIO && ARCH_MVEBU
206	default y
207	help
208	  Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
209
210config ZYNQ_GPIO
211	bool "Zynq GPIO driver"
212	depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP)
213	default y
214	help
215	  Supports GPIO access on Zynq SoC.
216
217config DM_74X164
218	bool "74x164 serial-in/parallel-out 8-bits shift register"
219	depends on DM_GPIO
220	help
221	  Driver for 74x164 compatible serial-in/parallel-out 8-outputs
222	  shift registers, such as 74lv165, 74hc595.
223	  This driver can be used to provide access to more gpio outputs.
224
225config DM_PCA953X
226	bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
227	depends on DM_GPIO
228	help
229	  Say yes here to provide access to several register-oriented
230	  SMBus I/O expanders, made mostly by NXP or TI.  Compatible
231	  models include:
232
233	  4 bits:	pca9536, pca9537
234
235	  8 bits:	max7310, max7315, pca6107, pca9534, pca9538, pca9554,
236			pca9556, pca9557, pca9574, tca6408, xra1202
237
238	  16 bits:	max7312, max7313, pca9535, pca9539, pca9555, pca9575,
239			tca6416
240
241	  24 bits:	tca6424
242
243	  40 bits:	pca9505, pca9698
244
245	  Now, max 24 bits chips and PCA953X compatible chips are
246	  supported
247
248config MPC85XX_GPIO
249	bool "Freescale MPC85XX GPIO driver"
250	depends on DM_GPIO
251	help
252	  This driver supports the built-in GPIO controller of MPC85XX CPUs.
253	  Each GPIO bank is identified by its own entry in the device tree,
254	  i.e.
255
256	  gpio-controller@fc00 {
257		#gpio-cells = <2>;
258		compatible = "fsl,pq3-gpio";
259		reg = <0xfc00 0x100>
260	  }
261
262	  By default, each bank is assumed to have 32 GPIOs, but the ngpios
263	  setting is honored, so the number of GPIOs for each bank is
264	  configurable to match the actual GPIO count of the SoC (e.g. the
265	  32/32/23 banks of the P1022 SoC).
266
267	  Aside from the standard functions of input/output mode, and output
268	  value setting, the open-drain feature, which can configure individual
269	  GPIOs to work as open-drain outputs, is supported.
270
271	  The driver has been tested on MPC85XX, but it is likely that other
272	  PowerQUICC III devices will work as well.
273endmenu
274