1# 2# GPIO infrastructure and drivers 3# 4 5menu "GPIO Support" 6 7config DM_GPIO 8 bool "Enable Driver Model for GPIO drivers" 9 depends on DM 10 help 11 Enable driver model for GPIO access. The standard GPIO 12 interface (gpio_get_value(), etc.) is then implemented by 13 the GPIO uclass. Drivers provide methods to query the 14 particular GPIOs that they provide. The uclass interface 15 is defined in include/asm-generic/gpio.h. 16 17config ALTERA_PIO 18 bool "Altera PIO driver" 19 depends on DM_GPIO 20 help 21 Select this to enable PIO for Altera devices. Please find 22 details on the "Embedded Peripherals IP User Guide" of Altera. 23 24config BCM6345_GPIO 25 bool "BCM6345 GPIO driver" 26 depends on DM_GPIO && ARCH_BMIPS 27 help 28 This driver supports the GPIO banks on BCM6345 SoCs. 29 30config DWAPB_GPIO 31 bool "DWAPB GPIO driver" 32 depends on DM && DM_GPIO 33 default n 34 help 35 Support for the Designware APB GPIO driver. 36 37config AT91_GPIO 38 bool "AT91 PIO GPIO driver" 39 depends on DM_GPIO 40 default n 41 help 42 Say yes here to select AT91 PIO GPIO driver. AT91 PIO 43 controller manages up to 32 fully programmable input/output 44 lines. Each I/O line may be dedicated as a general-purpose 45 I/O or be assigned to a function of an embedded peripheral. 46 The assignment to a function of an embedded peripheral is 47 the responsibility of AT91 Pinctrl driver. This driver is 48 responsible for the general-purpose I/O. 49 50config ATMEL_PIO4 51 bool "ATMEL PIO4 driver" 52 depends on DM_GPIO 53 default n 54 help 55 Say yes here to support the Atmel PIO4 driver. 56 The PIO4 is new version of Atmel PIO controller, which manages 57 up to 128 fully programmable input/output lines. Each I/O line 58 may be dedicated as a general purpose I/O or be assigned to 59 a function of an embedded peripheral. 60 61config INTEL_BROADWELL_GPIO 62 bool "Intel Broadwell GPIO driver" 63 depends on DM 64 help 65 This driver supports Broadwell U devices which have an expanded 66 GPIO feature set. The difference is large enough to merit a separate 67 driver from the common Intel ICH6 driver. It supports a total of 68 95 GPIOs which can be configured from the device tree. 69 70config IMX_RGPIO2P 71 bool "i.MX7ULP RGPIO2P driver" 72 depends on DM 73 default n 74 help 75 This driver supports i.MX7ULP Rapid GPIO2P controller. 76 77config LPC32XX_GPIO 78 bool "LPC32XX GPIO driver" 79 depends on DM 80 default n 81 help 82 Support for the LPC32XX GPIO driver. 83 84config MSM_GPIO 85 bool "Qualcomm GPIO driver" 86 depends on DM_GPIO 87 default n 88 help 89 Support GPIO controllers on Qualcomm Snapdragon family of SoCs. 90 This controller have single bank (default name "soc"), every 91 gpio has it's own set of registers. 92 Only simple GPIO operations are supported (get/set, change of 93 direction and checking pin function). 94 Supported devices: 95 - APQ8016 96 - MSM8916 97 98config PM8916_GPIO 99 bool "Qualcomm PM8916 PMIC GPIO/keypad driver" 100 depends on DM_GPIO && PMIC_PM8916 101 help 102 Support for GPIO pins and power/reset buttons found on 103 Qualcomm PM8916 PMIC. 104 Default name for GPIO bank is "pm8916". 105 Power and reset buttons are placed in "pm8916_key" bank and 106 have gpio numbers 0 and 1 respectively. 107 108config PCF8575_GPIO 109 bool "PCF8575 I2C GPIO Expander driver" 110 depends on DM_GPIO && DM_I2C 111 help 112 Support for PCF8575 I2C 16-bit GPIO expander. Most of these 113 chips are from NXP and TI. 114 115config ROCKCHIP_GPIO 116 bool "Rockchip GPIO driver" 117 depends on DM_GPIO 118 help 119 Support GPIO access on Rockchip SoCs. The GPIOs are arranged into 120 a number of banks (different for each SoC type) each with 32 GPIOs. 121 The GPIOs for a device are defined in the device tree with one node 122 for each bank. 123 124config SANDBOX_GPIO 125 bool "Enable sandbox GPIO driver" 126 depends on SANDBOX && DM && DM_GPIO 127 help 128 This driver supports some simulated GPIOs which can be adjusted 129 using 'back door' functions like sandbox_gpio_set_value(). Then the 130 GPIOs can be inspected through the normal get_get_value() 131 interface. The purpose of this is to allow GPIOs to be used as 132 normal in sandbox, perhaps with test code actually driving the 133 behaviour of those GPIOs. 134 135config SANDBOX_GPIO_COUNT 136 int "Number of sandbox GPIOs" 137 depends on SANDBOX_GPIO 138 default 128 139 help 140 The sandbox driver can support any number of GPIOs. Generally these 141 are specified using the device tree. But you can also have a number 142 of 'anonymous' GPIOs that do not belong to any device or bank. 143 Select a suitable value depending on your needs. 144 145config TEGRA_GPIO 146 bool "Tegra20..210 GPIO driver" 147 depends on DM_GPIO 148 help 149 Support for the GPIO controller contained in NVIDIA Tegra20 through 150 Tegra210. 151 152config TEGRA186_GPIO 153 bool "Tegra186 GPIO driver" 154 depends on DM_GPIO 155 help 156 Support for the GPIO controller contained in NVIDIA Tegra186. This 157 covers both the "main" and "AON" controller instances, even though 158 they have slightly different register layout. 159 160config GPIO_UNIPHIER 161 bool "UniPhier GPIO" 162 depends on ARCH_UNIPHIER 163 help 164 Say yes here to support UniPhier GPIOs. 165 166config VYBRID_GPIO 167 bool "Vybrid GPIO driver" 168 depends on DM 169 default n 170 help 171 Say yes here to support Vybrid vf610 GPIOs. 172 173config PIC32_GPIO 174 bool "Microchip PIC32 GPIO driver" 175 depends on DM_GPIO && MACH_PIC32 176 default y 177 help 178 Say yes here to support Microchip PIC32 GPIOs. 179 180config STM32F7_GPIO 181 bool "ST STM32 GPIO driver" 182 depends on DM_GPIO && STM32 183 default y 184 help 185 Device model driver support for STM32 GPIO controller. It should be 186 usable on many stm32 families like stm32f4 & stm32H7. 187 Tested on STM32F7. 188 189config MVEBU_GPIO 190 bool "Marvell MVEBU GPIO driver" 191 depends on DM_GPIO && ARCH_MVEBU 192 default y 193 help 194 Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs. 195 196config ZYNQ_GPIO 197 bool "Zynq GPIO driver" 198 depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP) 199 default y 200 help 201 Supports GPIO access on Zynq SoC. 202 203config DM_74X164 204 bool "74x164 serial-in/parallel-out 8-bits shift register" 205 depends on DM_GPIO 206 help 207 Driver for 74x164 compatible serial-in/parallel-out 8-outputs 208 shift registers, such as 74lv165, 74hc595. 209 This driver can be used to provide access to more gpio outputs. 210 211config DM_PCA953X 212 bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" 213 depends on DM_GPIO 214 help 215 Say yes here to provide access to several register-oriented 216 SMBus I/O expanders, made mostly by NXP or TI. Compatible 217 models include: 218 219 4 bits: pca9536, pca9537 220 221 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, 222 pca9556, pca9557, pca9574, tca6408, xra1202 223 224 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, 225 tca6416 226 227 24 bits: tca6424 228 229 40 bits: pca9505, pca9698 230 231 Now, max 24 bits chips and PCA953X compatible chips are 232 supported 233 234config MPC85XX_GPIO 235 bool "Freescale MPC85XX GPIO driver" 236 depends on DM_GPIO 237 help 238 This driver supports the built-in GPIO controller of MPC85XX CPUs. 239 Each GPIO bank is identified by its own entry in the device tree, 240 i.e. 241 242 gpio-controller@fc00 { 243 #gpio-cells = <2>; 244 compatible = "fsl,pq3-gpio"; 245 reg = <0xfc00 0x100> 246 } 247 248 By default, each bank is assumed to have 32 GPIOs, but the ngpios 249 setting is honored, so the number of GPIOs for each bank is 250 configurable to match the actual GPIO count of the SoC (e.g. the 251 32/32/23 banks of the P1022 SoC). 252 253 Aside from the standard functions of input/output mode, and output 254 value setting, the open-drain feature, which can configure individual 255 GPIOs to work as open-drain outputs, is supported. 256 257 The driver has been tested on MPC85XX, but it is likely that other 258 PowerQUICC III devices will work as well. 259endmenu 260