xref: /openbmc/u-boot/drivers/gpio/Kconfig (revision 30b1ecd2) 
1#
2# GPIO infrastructure and drivers
3#
4
5menu "GPIO Support"
6
7config DM_GPIO
8	bool "Enable Driver Model for GPIO drivers"
9	depends on DM
10	help
11	  Enable driver model for GPIO access. The standard GPIO
12	  interface (gpio_get_value(), etc.) is then implemented by
13	  the GPIO uclass. Drivers provide methods to query the
14	  particular GPIOs that they provide. The uclass interface
15	  is defined in include/asm-generic/gpio.h.
16
17config ALTERA_PIO
18	bool "Altera PIO driver"
19	depends on DM_GPIO
20	help
21	  Select this to enable PIO for Altera devices. Please find
22	  details on the "Embedded Peripherals IP User Guide" of Altera.
23
24config BCM6345_GPIO
25	bool "BCM6345 GPIO driver"
26	depends on DM_GPIO && ARCH_BMIPS
27	help
28	  This driver supports the GPIO banks on BCM6345 SoCs.
29
30config DWAPB_GPIO
31	bool "DWAPB GPIO driver"
32	depends on DM && DM_GPIO
33	default n
34	help
35	  Support for the Designware APB GPIO driver.
36
37config AT91_GPIO
38	bool "AT91 PIO GPIO driver"
39	depends on DM_GPIO
40	default n
41	help
42	  Say yes here to select AT91 PIO GPIO driver. AT91 PIO
43	  controller manages up to 32 fully programmable input/output
44	  lines. Each I/O line may be dedicated as a general-purpose
45	  I/O or be assigned to a function of an embedded peripheral.
46	  The assignment to a function of an embedded peripheral is
47	  the responsibility of AT91 Pinctrl driver. This driver is
48	  responsible for the general-purpose I/O.
49
50config ATMEL_PIO4
51	bool "ATMEL PIO4 driver"
52	depends on DM_GPIO
53	default n
54	help
55	  Say yes here to support the Atmel PIO4 driver.
56	  The PIO4 is new version of Atmel PIO controller, which manages
57	  up to 128 fully programmable input/output lines. Each I/O line
58	  may be dedicated as a general purpose I/O or be assigned to
59	  a function of an embedded peripheral.
60
61config INTEL_BROADWELL_GPIO
62	bool "Intel Broadwell GPIO driver"
63	depends on DM
64	help
65	  This driver supports Broadwell U devices which have an expanded
66	  GPIO feature set. The difference is large enough to merit a separate
67	  driver from the common Intel ICH6 driver. It supports a total of
68	  95 GPIOs which can be configured from the device tree.
69
70config IMX_RGPIO2P
71	bool "i.MX7ULP RGPIO2P driver"
72	depends on DM
73	default n
74	help
75	  This driver supports i.MX7ULP Rapid GPIO2P controller.
76
77config LPC32XX_GPIO
78	bool "LPC32XX GPIO driver"
79	depends on DM
80	default n
81	help
82	  Support for the LPC32XX GPIO driver.
83
84config MSM_GPIO
85	bool "Qualcomm GPIO driver"
86	depends on DM_GPIO
87	default n
88	help
89	  Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
90	  This controller have single bank (default name "soc"), every
91	  gpio has it's own set of registers.
92	  Only simple GPIO operations are supported (get/set, change of
93	  direction and checking pin function).
94	  Supported devices:
95	  - APQ8016
96	  - MSM8916
97
98config OMAP_GPIO
99	bool "TI OMAP GPIO driver"
100	depends on ARCH_OMAP2PLUS
101	default y
102	help
103	  Support GPIO controllers on the TI OMAP3/4/5 and related (such as
104	  AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs.
105
106config PM8916_GPIO
107	bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
108	depends on DM_GPIO && PMIC_PM8916
109	help
110	  Support for GPIO pins and power/reset buttons found on
111	  Qualcomm PM8916 PMIC.
112	  Default name for GPIO bank is "pm8916".
113	  Power and reset buttons are placed in "pm8916_key" bank and
114          have gpio numbers 0 and 1 respectively.
115
116config PCF8575_GPIO
117	bool "PCF8575 I2C GPIO Expander driver"
118	depends on DM_GPIO && DM_I2C
119	help
120	 Support for PCF8575 I2C 16-bit GPIO expander. Most of these
121	 chips are from NXP and TI.
122
123config ROCKCHIP_GPIO
124	bool "Rockchip GPIO driver"
125	depends on DM_GPIO
126	help
127	  Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
128	  a number of banks (different for each SoC type) each with 32 GPIOs.
129	  The GPIOs for a device are defined in the device tree with one node
130	  for each bank.
131
132config SANDBOX_GPIO
133	bool "Enable sandbox GPIO driver"
134	depends on SANDBOX && DM && DM_GPIO
135	help
136	  This driver supports some simulated GPIOs which can be adjusted
137	  using 'back door' functions like sandbox_gpio_set_value(). Then the
138	  GPIOs can be inspected through the normal get_get_value()
139	  interface. The purpose of this is to allow GPIOs to be used as
140	  normal in sandbox, perhaps with test code actually driving the
141	  behaviour of those GPIOs.
142
143config SANDBOX_GPIO_COUNT
144	int "Number of sandbox GPIOs"
145	depends on SANDBOX_GPIO
146	default 128
147	help
148	  The sandbox driver can support any number of GPIOs. Generally these
149	  are specified using the device tree. But you can also have a number
150	  of 'anonymous' GPIOs that do not belong to any device or bank.
151	  Select a suitable value depending on your needs.
152
153config TEGRA_GPIO
154	bool "Tegra20..210 GPIO driver"
155	depends on DM_GPIO
156	help
157	  Support for the GPIO controller contained in NVIDIA Tegra20 through
158	  Tegra210.
159
160config TEGRA186_GPIO
161	bool "Tegra186 GPIO driver"
162	depends on DM_GPIO
163	help
164	  Support for the GPIO controller contained in NVIDIA Tegra186. This
165	  covers both the "main" and "AON" controller instances, even though
166	  they have slightly different register layout.
167
168config GPIO_UNIPHIER
169	bool "UniPhier GPIO"
170	depends on ARCH_UNIPHIER
171	help
172	  Say yes here to support UniPhier GPIOs.
173
174config VYBRID_GPIO
175	bool "Vybrid GPIO driver"
176	depends on DM
177	default n
178	help
179	  Say yes here to support Vybrid vf610 GPIOs.
180
181config PIC32_GPIO
182	bool "Microchip PIC32 GPIO driver"
183	depends on DM_GPIO && MACH_PIC32
184	default y
185	help
186	  Say yes here to support Microchip PIC32 GPIOs.
187
188config STM32F7_GPIO
189	bool "ST STM32 GPIO driver"
190	depends on DM_GPIO && STM32
191	default y
192	help
193	  Device model driver support for STM32 GPIO controller. It should be
194	  usable on many stm32 families like stm32f4 & stm32H7.
195	  Tested on STM32F7.
196
197config MVEBU_GPIO
198	bool "Marvell MVEBU GPIO driver"
199	depends on DM_GPIO && ARCH_MVEBU
200	default y
201	help
202	  Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
203
204config ZYNQ_GPIO
205	bool "Zynq GPIO driver"
206	depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP)
207	default y
208	help
209	  Supports GPIO access on Zynq SoC.
210
211config DM_74X164
212	bool "74x164 serial-in/parallel-out 8-bits shift register"
213	depends on DM_GPIO
214	help
215	  Driver for 74x164 compatible serial-in/parallel-out 8-outputs
216	  shift registers, such as 74lv165, 74hc595.
217	  This driver can be used to provide access to more gpio outputs.
218
219config DM_PCA953X
220	bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
221	depends on DM_GPIO
222	help
223	  Say yes here to provide access to several register-oriented
224	  SMBus I/O expanders, made mostly by NXP or TI.  Compatible
225	  models include:
226
227	  4 bits:	pca9536, pca9537
228
229	  8 bits:	max7310, max7315, pca6107, pca9534, pca9538, pca9554,
230			pca9556, pca9557, pca9574, tca6408, xra1202
231
232	  16 bits:	max7312, max7313, pca9535, pca9539, pca9555, pca9575,
233			tca6416
234
235	  24 bits:	tca6424
236
237	  40 bits:	pca9505, pca9698
238
239	  Now, max 24 bits chips and PCA953X compatible chips are
240	  supported
241
242config MPC85XX_GPIO
243	bool "Freescale MPC85XX GPIO driver"
244	depends on DM_GPIO
245	help
246	  This driver supports the built-in GPIO controller of MPC85XX CPUs.
247	  Each GPIO bank is identified by its own entry in the device tree,
248	  i.e.
249
250	  gpio-controller@fc00 {
251		#gpio-cells = <2>;
252		compatible = "fsl,pq3-gpio";
253		reg = <0xfc00 0x100>
254	  }
255
256	  By default, each bank is assumed to have 32 GPIOs, but the ngpios
257	  setting is honored, so the number of GPIOs for each bank is
258	  configurable to match the actual GPIO count of the SoC (e.g. the
259	  32/32/23 banks of the P1022 SoC).
260
261	  Aside from the standard functions of input/output mode, and output
262	  value setting, the open-drain feature, which can configure individual
263	  GPIOs to work as open-drain outputs, is supported.
264
265	  The driver has been tested on MPC85XX, but it is likely that other
266	  PowerQUICC III devices will work as well.
267endmenu
268