1# 2# GPIO infrastructure and drivers 3# 4 5menu "GPIO Support" 6 7config DM_GPIO 8 bool "Enable Driver Model for GPIO drivers" 9 depends on DM 10 help 11 Enable driver model for GPIO access. The standard GPIO 12 interface (gpio_get_value(), etc.) is then implemented by 13 the GPIO uclass. Drivers provide methods to query the 14 particular GPIOs that they provide. The uclass interface 15 is defined in include/asm-generic/gpio.h. 16 17config ALTERA_PIO 18 bool "Altera PIO driver" 19 depends on DM_GPIO 20 help 21 Select this to enable PIO for Altera devices. Please find 22 details on the "Embedded Peripherals IP User Guide" of Altera. 23 24config DWAPB_GPIO 25 bool "DWAPB GPIO driver" 26 depends on DM && DM_GPIO 27 default n 28 help 29 Support for the Designware APB GPIO driver. 30 31config AT91_GPIO 32 bool "AT91 PIO GPIO driver" 33 depends on DM_GPIO 34 default n 35 help 36 Say yes here to select AT91 PIO GPIO driver. AT91 PIO 37 controller manages up to 32 fully programmable input/output 38 lines. Each I/O line may be dedicated as a general-purpose 39 I/O or be assigned to a function of an embedded peripheral. 40 The assignment to a function of an embedded peripheral is 41 the responsibility of AT91 Pinctrl driver. This driver is 42 responsible for the general-purpose I/O. 43 44config ATMEL_PIO4 45 bool "ATMEL PIO4 driver" 46 depends on DM_GPIO 47 default n 48 help 49 Say yes here to support the Atmel PIO4 driver. 50 The PIO4 is new version of Atmel PIO controller, which manages 51 up to 128 fully programmable input/output lines. Each I/O line 52 may be dedicated as a general purpose I/O or be assigned to 53 a function of an embedded peripheral. 54 55config INTEL_BROADWELL_GPIO 56 bool "Intel Broadwell GPIO driver" 57 depends on DM 58 help 59 This driver supports Broadwell U devices which have an expanded 60 GPIO feature set. The difference is large enough to merit a separate 61 driver from the common Intel ICH6 driver. It supports a total of 62 95 GPIOs which can be configured from the device tree. 63 64config IMX_RGPIO2P 65 bool "i.MX7ULP RGPIO2P driver" 66 depends on DM 67 default n 68 help 69 This driver supports i.MX7ULP Rapid GPIO2P controller. 70 71config LPC32XX_GPIO 72 bool "LPC32XX GPIO driver" 73 depends on DM 74 default n 75 help 76 Support for the LPC32XX GPIO driver. 77 78config MSM_GPIO 79 bool "Qualcomm GPIO driver" 80 depends on DM_GPIO 81 default n 82 help 83 Support GPIO controllers on Qualcomm Snapdragon family of SoCs. 84 This controller have single bank (default name "soc"), every 85 gpio has it's own set of registers. 86 Only simple GPIO operations are supported (get/set, change of 87 direction and checking pin function). 88 Supported devices: 89 - APQ8016 90 - MSM8916 91 92config PM8916_GPIO 93 bool "Qualcomm PM8916 PMIC GPIO/keypad driver" 94 depends on DM_GPIO && PMIC_PM8916 95 help 96 Support for GPIO pins and power/reset buttons found on 97 Qualcomm PM8916 PMIC. 98 Default name for GPIO bank is "pm8916". 99 Power and reset buttons are placed in "pm8916_key" bank and 100 have gpio numbers 0 and 1 respectively. 101 102config PCF8575_GPIO 103 bool "PCF8575 I2C GPIO Expander driver" 104 depends on DM_GPIO && DM_I2C 105 help 106 Support for PCF8575 I2C 16-bit GPIO expander. Most of these 107 chips are from NXP and TI. 108 109config ROCKCHIP_GPIO 110 bool "Rockchip GPIO driver" 111 depends on DM_GPIO 112 help 113 Support GPIO access on Rockchip SoCs. The GPIOs are arranged into 114 a number of banks (different for each SoC type) each with 32 GPIOs. 115 The GPIOs for a device are defined in the device tree with one node 116 for each bank. 117 118config SANDBOX_GPIO 119 bool "Enable sandbox GPIO driver" 120 depends on SANDBOX && DM && DM_GPIO 121 help 122 This driver supports some simulated GPIOs which can be adjusted 123 using 'back door' functions like sandbox_gpio_set_value(). Then the 124 GPIOs can be inspected through the normal get_get_value() 125 interface. The purpose of this is to allow GPIOs to be used as 126 normal in sandbox, perhaps with test code actually driving the 127 behaviour of those GPIOs. 128 129config SANDBOX_GPIO_COUNT 130 int "Number of sandbox GPIOs" 131 depends on SANDBOX_GPIO 132 default 128 133 help 134 The sandbox driver can support any number of GPIOs. Generally these 135 are specified using the device tree. But you can also have a number 136 of 'anonymous' GPIOs that do not belong to any device or bank. 137 Select a suitable value depending on your needs. 138 139config TEGRA_GPIO 140 bool "Tegra20..210 GPIO driver" 141 depends on DM_GPIO 142 help 143 Support for the GPIO controller contained in NVIDIA Tegra20 through 144 Tegra210. 145 146config TEGRA186_GPIO 147 bool "Tegra186 GPIO driver" 148 depends on DM_GPIO 149 help 150 Support for the GPIO controller contained in NVIDIA Tegra186. This 151 covers both the "main" and "AON" controller instances, even though 152 they have slightly different register layout. 153 154config GPIO_UNIPHIER 155 bool "UniPhier GPIO" 156 depends on ARCH_UNIPHIER 157 help 158 Say yes here to support UniPhier GPIOs. 159 160config VYBRID_GPIO 161 bool "Vybrid GPIO driver" 162 depends on DM 163 default n 164 help 165 Say yes here to support Vybrid vf610 GPIOs. 166 167config PIC32_GPIO 168 bool "Microchip PIC32 GPIO driver" 169 depends on DM_GPIO && MACH_PIC32 170 default y 171 help 172 Say yes here to support Microchip PIC32 GPIOs. 173 174config STM32F7_GPIO 175 bool "ST STM32 GPIO driver" 176 depends on DM_GPIO && STM32 177 default y 178 help 179 Device model driver support for STM32 GPIO controller. It should be 180 usable on many stm32 families like stm32f4 & stm32H7. 181 Tested on STM32F7. 182 183config MVEBU_GPIO 184 bool "Marvell MVEBU GPIO driver" 185 depends on DM_GPIO && ARCH_MVEBU 186 default y 187 help 188 Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs. 189 190config ZYNQ_GPIO 191 bool "Zynq GPIO driver" 192 depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP) 193 default y 194 help 195 Supports GPIO access on Zynq SoC. 196 197config DM_74X164 198 bool "74x164 serial-in/parallel-out 8-bits shift register" 199 depends on DM_GPIO 200 help 201 Driver for 74x164 compatible serial-in/parallel-out 8-outputs 202 shift registers, such as 74lv165, 74hc595. 203 This driver can be used to provide access to more gpio outputs. 204 205config DM_PCA953X 206 bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" 207 depends on DM_GPIO 208 help 209 Say yes here to provide access to several register-oriented 210 SMBus I/O expanders, made mostly by NXP or TI. Compatible 211 models include: 212 213 4 bits: pca9536, pca9537 214 215 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, 216 pca9556, pca9557, pca9574, tca6408, xra1202 217 218 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, 219 tca6416 220 221 24 bits: tca6424 222 223 40 bits: pca9505, pca9698 224 225 Now, max 24 bits chips and PCA953X compatible chips are 226 supported 227 228config MPC85XX_GPIO 229 bool "Freescale MPC85XX GPIO driver" 230 depends on DM_GPIO 231 help 232 This driver supports the built-in GPIO controller of MPC85XX CPUs. 233 Each GPIO bank is identified by its own entry in the device tree, 234 i.e. 235 236 gpio-controller@fc00 { 237 #gpio-cells = <2>; 238 compatible = "fsl,pq3-gpio"; 239 reg = <0xfc00 0x100> 240 } 241 242 By default, each bank is assumed to have 32 GPIOs, but the ngpios 243 setting is honored, so the number of GPIOs for each bank is 244 configurable to match the actual GPIO count of the SoC (e.g. the 245 32/32/23 banks of the P1022 SoC). 246 247 Aside from the standard functions of input/output mode, and output 248 value setting, the open-drain feature, which can configure individual 249 GPIOs to work as open-drain outputs, is supported. 250 251 The driver has been tested on MPC85XX, but it is likely that other 252 PowerQUICC III devices will work as well. 253endmenu 254