xref: /openbmc/u-boot/drivers/fpga/xilinx.c (revision 7ca6f363)
1 /*
2  * (C) Copyright 2012-2013, Xilinx, Michal Simek
3  *
4  * (C) Copyright 2002
5  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
6  * Keith Outwater, keith_outwater@mvis.com
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 /*
12  *  Xilinx FPGA support
13  */
14 
15 #include <common.h>
16 #include <fpga.h>
17 #include <virtex2.h>
18 #include <spartan2.h>
19 #include <spartan3.h>
20 #include <zynqpl.h>
21 
22 #if 0
23 #define FPGA_DEBUG
24 #endif
25 
26 /* Define FPGA_DEBUG to get debug printf's */
27 #ifdef	FPGA_DEBUG
28 #define	PRINTF(fmt,args...)	printf (fmt ,##args)
29 #else
30 #define PRINTF(fmt,args...)
31 #endif
32 
33 /* Local Static Functions */
34 static int xilinx_validate (Xilinx_desc * desc, char *fn);
35 
36 /* ------------------------------------------------------------------------- */
37 
38 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
39 {
40 	unsigned int length;
41 	unsigned int swapsize;
42 	char buffer[80];
43 	unsigned char *dataptr;
44 	unsigned int i;
45 	const fpga_desc *desc;
46 	Xilinx_desc *xdesc;
47 
48 	dataptr = (unsigned char *)fpgadata;
49 	/* Find out fpga_description */
50 	desc = fpga_validate(devnum, dataptr, 0, (char *)__func__);
51 	/* Assign xilinx device description */
52 	xdesc = desc->devdesc;
53 
54 	/* skip the first bytes of the bitsteam, their meaning is unknown */
55 	length = (*dataptr << 8) + *(dataptr + 1);
56 	dataptr += 2;
57 	dataptr += length;
58 
59 	/* get design name (identifier, length, string) */
60 	length = (*dataptr << 8) + *(dataptr + 1);
61 	dataptr += 2;
62 	if (*dataptr++ != 0x61) {
63 		debug("%s: Design name id not recognized in bitstream\n",
64 		      __func__);
65 		return FPGA_FAIL;
66 	}
67 
68 	length = (*dataptr << 8) + *(dataptr + 1);
69 	dataptr += 2;
70 	for (i = 0; i < length; i++)
71 		buffer[i] = *dataptr++;
72 
73 	printf("  design filename = \"%s\"\n", buffer);
74 
75 	/* get part number (identifier, length, string) */
76 	if (*dataptr++ != 0x62) {
77 		printf("%s: Part number id not recognized in bitstream\n",
78 		       __func__);
79 		return FPGA_FAIL;
80 	}
81 
82 	length = (*dataptr << 8) + *(dataptr + 1);
83 	dataptr += 2;
84 	for (i = 0; i < length; i++)
85 		buffer[i] = *dataptr++;
86 
87 	if (xdesc->name) {
88 		i = strncmp(buffer, xdesc->name, strlen(xdesc->name));
89 		if (i) {
90 			printf("%s: Wrong bitstream ID for this device\n",
91 			       __func__);
92 			printf("%s: Bitstream ID %s, current device ID %d/%s\n",
93 			       __func__, buffer, devnum, xdesc->name);
94 			return FPGA_FAIL;
95 		}
96 	} else {
97 		printf("%s: Please fill correct device ID to Xilinx_desc\n",
98 		       __func__);
99 	}
100 	printf("  part number = \"%s\"\n", buffer);
101 
102 	/* get date (identifier, length, string) */
103 	if (*dataptr++ != 0x63) {
104 		printf("%s: Date identifier not recognized in bitstream\n",
105 		       __func__);
106 		return FPGA_FAIL;
107 	}
108 
109 	length = (*dataptr << 8) + *(dataptr+1);
110 	dataptr += 2;
111 	for (i = 0; i < length; i++)
112 		buffer[i] = *dataptr++;
113 	printf("  date = \"%s\"\n", buffer);
114 
115 	/* get time (identifier, length, string) */
116 	if (*dataptr++ != 0x64) {
117 		printf("%s: Time identifier not recognized in bitstream\n",
118 		       __func__);
119 		return FPGA_FAIL;
120 	}
121 
122 	length = (*dataptr << 8) + *(dataptr+1);
123 	dataptr += 2;
124 	for (i = 0; i < length; i++)
125 		buffer[i] = *dataptr++;
126 	printf("  time = \"%s\"\n", buffer);
127 
128 	/* get fpga data length (identifier, length) */
129 	if (*dataptr++ != 0x65) {
130 		printf("%s: Data length id not recognized in bitstream\n",
131 		       __func__);
132 		return FPGA_FAIL;
133 	}
134 	swapsize = ((unsigned int) *dataptr << 24) +
135 		   ((unsigned int) *(dataptr + 1) << 16) +
136 		   ((unsigned int) *(dataptr + 2) << 8) +
137 		   ((unsigned int) *(dataptr + 3));
138 	dataptr += 4;
139 	printf("  bytes in bitstream = %d\n", swapsize);
140 
141 	return fpga_load(devnum, dataptr, swapsize);
142 }
143 
144 int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
145 {
146 	int ret_val = FPGA_FAIL;	/* assume a failure */
147 
148 	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
149 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
150 	} else
151 		switch (desc->family) {
152 		case Xilinx_Spartan2:
153 #if defined(CONFIG_FPGA_SPARTAN2)
154 			PRINTF ("%s: Launching the Spartan-II Loader...\n",
155 					__FUNCTION__);
156 			ret_val = Spartan2_load (desc, buf, bsize);
157 #else
158 			printf ("%s: No support for Spartan-II devices.\n",
159 					__FUNCTION__);
160 #endif
161 			break;
162 		case Xilinx_Spartan3:
163 #if defined(CONFIG_FPGA_SPARTAN3)
164 			PRINTF ("%s: Launching the Spartan-III Loader...\n",
165 					__FUNCTION__);
166 			ret_val = Spartan3_load (desc, buf, bsize);
167 #else
168 			printf ("%s: No support for Spartan-III devices.\n",
169 					__FUNCTION__);
170 #endif
171 			break;
172 		case Xilinx_Virtex2:
173 #if defined(CONFIG_FPGA_VIRTEX2)
174 			PRINTF ("%s: Launching the Virtex-II Loader...\n",
175 					__FUNCTION__);
176 			ret_val = Virtex2_load (desc, buf, bsize);
177 #else
178 			printf ("%s: No support for Virtex-II devices.\n",
179 					__FUNCTION__);
180 #endif
181 			break;
182 		case xilinx_zynq:
183 #if defined(CONFIG_FPGA_ZYNQPL)
184 			PRINTF("%s: Launching the Zynq PL Loader...\n",
185 			       __func__);
186 			ret_val = zynq_load(desc, buf, bsize);
187 #else
188 			printf("%s: No support for Zynq devices.\n",
189 			       __func__);
190 #endif
191 			break;
192 
193 		default:
194 			printf ("%s: Unsupported family type, %d\n",
195 					__FUNCTION__, desc->family);
196 		}
197 
198 	return ret_val;
199 }
200 
201 int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
202 {
203 	int ret_val = FPGA_FAIL;	/* assume a failure */
204 
205 	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
206 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
207 	} else
208 		switch (desc->family) {
209 		case Xilinx_Spartan2:
210 #if defined(CONFIG_FPGA_SPARTAN2)
211 			PRINTF ("%s: Launching the Spartan-II Reader...\n",
212 					__FUNCTION__);
213 			ret_val = Spartan2_dump (desc, buf, bsize);
214 #else
215 			printf ("%s: No support for Spartan-II devices.\n",
216 					__FUNCTION__);
217 #endif
218 			break;
219 		case Xilinx_Spartan3:
220 #if defined(CONFIG_FPGA_SPARTAN3)
221 			PRINTF ("%s: Launching the Spartan-III Reader...\n",
222 					__FUNCTION__);
223 			ret_val = Spartan3_dump (desc, buf, bsize);
224 #else
225 			printf ("%s: No support for Spartan-III devices.\n",
226 					__FUNCTION__);
227 #endif
228 			break;
229 		case Xilinx_Virtex2:
230 #if defined( CONFIG_FPGA_VIRTEX2)
231 			PRINTF ("%s: Launching the Virtex-II Reader...\n",
232 					__FUNCTION__);
233 			ret_val = Virtex2_dump (desc, buf, bsize);
234 #else
235 			printf ("%s: No support for Virtex-II devices.\n",
236 					__FUNCTION__);
237 #endif
238 			break;
239 		case xilinx_zynq:
240 #if defined(CONFIG_FPGA_ZYNQPL)
241 			PRINTF("%s: Launching the Zynq PL Reader...\n",
242 			       __func__);
243 			ret_val = zynq_dump(desc, buf, bsize);
244 #else
245 			printf("%s: No support for Zynq devices.\n",
246 			       __func__);
247 #endif
248 			break;
249 
250 		default:
251 			printf ("%s: Unsupported family type, %d\n",
252 					__FUNCTION__, desc->family);
253 		}
254 
255 	return ret_val;
256 }
257 
258 int xilinx_info (Xilinx_desc * desc)
259 {
260 	int ret_val = FPGA_FAIL;
261 
262 	if (xilinx_validate (desc, (char *)__FUNCTION__)) {
263 		printf ("Family:        \t");
264 		switch (desc->family) {
265 		case Xilinx_Spartan2:
266 			printf ("Spartan-II\n");
267 			break;
268 		case Xilinx_Spartan3:
269 			printf ("Spartan-III\n");
270 			break;
271 		case Xilinx_Virtex2:
272 			printf ("Virtex-II\n");
273 			break;
274 		case xilinx_zynq:
275 			printf("Zynq PL\n");
276 			break;
277 			/* Add new family types here */
278 		default:
279 			printf ("Unknown family type, %d\n", desc->family);
280 		}
281 
282 		printf ("Interface type:\t");
283 		switch (desc->iface) {
284 		case slave_serial:
285 			printf ("Slave Serial\n");
286 			break;
287 		case master_serial:	/* Not used */
288 			printf ("Master Serial\n");
289 			break;
290 		case slave_parallel:
291 			printf ("Slave Parallel\n");
292 			break;
293 		case jtag_mode:		/* Not used */
294 			printf ("JTAG Mode\n");
295 			break;
296 		case slave_selectmap:
297 			printf ("Slave SelectMap Mode\n");
298 			break;
299 		case master_selectmap:
300 			printf ("Master SelectMap Mode\n");
301 			break;
302 		case devcfg:
303 			printf("Device configuration interface (Zynq)\n");
304 			break;
305 			/* Add new interface types here */
306 		default:
307 			printf ("Unsupported interface type, %d\n", desc->iface);
308 		}
309 
310 		printf ("Device Size:   \t%d bytes\n"
311 				"Cookie:        \t0x%x (%d)\n",
312 				desc->size, desc->cookie, desc->cookie);
313 		if (desc->name)
314 			printf("Device name:   \t%s\n", desc->name);
315 
316 		if (desc->iface_fns) {
317 			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
318 			switch (desc->family) {
319 			case Xilinx_Spartan2:
320 #if defined(CONFIG_FPGA_SPARTAN2)
321 				Spartan2_info (desc);
322 #else
323 				/* just in case */
324 				printf ("%s: No support for Spartan-II devices.\n",
325 						__FUNCTION__);
326 #endif
327 				break;
328 			case Xilinx_Spartan3:
329 #if defined(CONFIG_FPGA_SPARTAN3)
330 				Spartan3_info (desc);
331 #else
332 				/* just in case */
333 				printf ("%s: No support for Spartan-III devices.\n",
334 						__FUNCTION__);
335 #endif
336 				break;
337 			case Xilinx_Virtex2:
338 #if defined(CONFIG_FPGA_VIRTEX2)
339 				Virtex2_info (desc);
340 #else
341 				/* just in case */
342 				printf ("%s: No support for Virtex-II devices.\n",
343 						__FUNCTION__);
344 #endif
345 				break;
346 			case xilinx_zynq:
347 #if defined(CONFIG_FPGA_ZYNQPL)
348 				zynq_info(desc);
349 #else
350 				/* just in case */
351 				printf("%s: No support for Zynq devices.\n",
352 				       __func__);
353 #endif
354 				/* Add new family types here */
355 			default:
356 				/* we don't need a message here - we give one up above */
357 				;
358 			}
359 		} else
360 			printf ("No Device Function Table.\n");
361 
362 		ret_val = FPGA_SUCCESS;
363 	} else {
364 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
365 	}
366 
367 	return ret_val;
368 }
369 
370 /* ------------------------------------------------------------------------- */
371 
372 static int xilinx_validate (Xilinx_desc * desc, char *fn)
373 {
374 	int ret_val = false;
375 
376 	if (desc) {
377 		if ((desc->family > min_xilinx_type) &&
378 			(desc->family < max_xilinx_type)) {
379 			if ((desc->iface > min_xilinx_iface_type) &&
380 				(desc->iface < max_xilinx_iface_type)) {
381 				if (desc->size) {
382 					ret_val = true;
383 				} else
384 					printf ("%s: NULL part size\n", fn);
385 			} else
386 				printf ("%s: Invalid Interface type, %d\n",
387 						fn, desc->iface);
388 		} else
389 			printf ("%s: Invalid family type, %d\n", fn, desc->family);
390 	} else
391 		printf ("%s: NULL descriptor!\n", fn);
392 
393 	return ret_val;
394 }
395