1 /* 2 * (C) Copyright 2002 3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 4 * Keith Outwater, keith_outwater@mvis.com 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 * 24 */ 25 26 /* 27 * Xilinx FPGA support 28 */ 29 30 #include <common.h> 31 #include <virtex2.h> 32 #include <spartan2.h> 33 #include <spartan3.h> 34 35 #if 0 36 #define FPGA_DEBUG 37 #endif 38 39 /* Define FPGA_DEBUG to get debug printf's */ 40 #ifdef FPGA_DEBUG 41 #define PRINTF(fmt,args...) printf (fmt ,##args) 42 #else 43 #define PRINTF(fmt,args...) 44 #endif 45 46 /* Local Static Functions */ 47 static int xilinx_validate (Xilinx_desc * desc, char *fn); 48 49 /* ------------------------------------------------------------------------- */ 50 51 int fpga_loadbitstream(unsigned long dev, char *fpgadata, size_t size) 52 { 53 unsigned int length; 54 unsigned int swapsize; 55 char buffer[80]; 56 unsigned char *dataptr; 57 unsigned int i; 58 59 dataptr = (unsigned char *)fpgadata; 60 61 /* skip the first bytes of the bitsteam, their meaning is unknown */ 62 length = (*dataptr << 8) + *(dataptr + 1); 63 dataptr += 2; 64 dataptr += length; 65 66 /* get design name (identifier, length, string) */ 67 length = (*dataptr << 8) + *(dataptr + 1); 68 dataptr += 2; 69 if (*dataptr++ != 0x61) { 70 debug("%s: Design name id not recognized in bitstream\n", 71 __func__); 72 return FPGA_FAIL; 73 } 74 75 length = (*dataptr << 8) + *(dataptr + 1); 76 dataptr += 2; 77 for (i = 0; i < length; i++) 78 buffer[i] = *dataptr++; 79 80 printf(" design filename = \"%s\"\n", buffer); 81 82 /* get part number (identifier, length, string) */ 83 if (*dataptr++ != 0x62) { 84 printf("%s: Part number id not recognized in bitstream\n", 85 __func__); 86 return FPGA_FAIL; 87 } 88 89 length = (*dataptr << 8) + *(dataptr + 1); 90 dataptr += 2; 91 for (i = 0; i < length; i++) 92 buffer[i] = *dataptr++; 93 printf(" part number = \"%s\"\n", buffer); 94 95 /* get date (identifier, length, string) */ 96 if (*dataptr++ != 0x63) { 97 printf("%s: Date identifier not recognized in bitstream\n", 98 __func__); 99 return FPGA_FAIL; 100 } 101 102 length = (*dataptr << 8) + *(dataptr+1); 103 dataptr += 2; 104 for (i = 0; i < length; i++) 105 buffer[i] = *dataptr++; 106 printf(" date = \"%s\"\n", buffer); 107 108 /* get time (identifier, length, string) */ 109 if (*dataptr++ != 0x64) { 110 printf("%s: Time identifier not recognized in bitstream\n", 111 __func__); 112 return FPGA_FAIL; 113 } 114 115 length = (*dataptr << 8) + *(dataptr+1); 116 dataptr += 2; 117 for (i = 0; i < length; i++) 118 buffer[i] = *dataptr++; 119 printf(" time = \"%s\"\n", buffer); 120 121 /* get fpga data length (identifier, length) */ 122 if (*dataptr++ != 0x65) { 123 printf("%s: Data length id not recognized in bitstream\n", 124 __func__); 125 return FPGA_FAIL; 126 } 127 swapsize = ((unsigned int) *dataptr << 24) + 128 ((unsigned int) *(dataptr + 1) << 16) + 129 ((unsigned int) *(dataptr + 2) << 8) + 130 ((unsigned int) *(dataptr + 3)); 131 dataptr += 4; 132 printf(" bytes in bitstream = %d\n", swapsize); 133 134 return fpga_load(dev, dataptr, swapsize); 135 } 136 137 int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) 138 { 139 int ret_val = FPGA_FAIL; /* assume a failure */ 140 141 if (!xilinx_validate (desc, (char *)__FUNCTION__)) { 142 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 143 } else 144 switch (desc->family) { 145 case Xilinx_Spartan2: 146 #if defined(CONFIG_FPGA_SPARTAN2) 147 PRINTF ("%s: Launching the Spartan-II Loader...\n", 148 __FUNCTION__); 149 ret_val = Spartan2_load (desc, buf, bsize); 150 #else 151 printf ("%s: No support for Spartan-II devices.\n", 152 __FUNCTION__); 153 #endif 154 break; 155 case Xilinx_Spartan3: 156 #if defined(CONFIG_FPGA_SPARTAN3) 157 PRINTF ("%s: Launching the Spartan-III Loader...\n", 158 __FUNCTION__); 159 ret_val = Spartan3_load (desc, buf, bsize); 160 #else 161 printf ("%s: No support for Spartan-III devices.\n", 162 __FUNCTION__); 163 #endif 164 break; 165 case Xilinx_Virtex2: 166 #if defined(CONFIG_FPGA_VIRTEX2) 167 PRINTF ("%s: Launching the Virtex-II Loader...\n", 168 __FUNCTION__); 169 ret_val = Virtex2_load (desc, buf, bsize); 170 #else 171 printf ("%s: No support for Virtex-II devices.\n", 172 __FUNCTION__); 173 #endif 174 break; 175 176 default: 177 printf ("%s: Unsupported family type, %d\n", 178 __FUNCTION__, desc->family); 179 } 180 181 return ret_val; 182 } 183 184 int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) 185 { 186 int ret_val = FPGA_FAIL; /* assume a failure */ 187 188 if (!xilinx_validate (desc, (char *)__FUNCTION__)) { 189 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 190 } else 191 switch (desc->family) { 192 case Xilinx_Spartan2: 193 #if defined(CONFIG_FPGA_SPARTAN2) 194 PRINTF ("%s: Launching the Spartan-II Reader...\n", 195 __FUNCTION__); 196 ret_val = Spartan2_dump (desc, buf, bsize); 197 #else 198 printf ("%s: No support for Spartan-II devices.\n", 199 __FUNCTION__); 200 #endif 201 break; 202 case Xilinx_Spartan3: 203 #if defined(CONFIG_FPGA_SPARTAN3) 204 PRINTF ("%s: Launching the Spartan-III Reader...\n", 205 __FUNCTION__); 206 ret_val = Spartan3_dump (desc, buf, bsize); 207 #else 208 printf ("%s: No support for Spartan-III devices.\n", 209 __FUNCTION__); 210 #endif 211 break; 212 case Xilinx_Virtex2: 213 #if defined( CONFIG_FPGA_VIRTEX2) 214 PRINTF ("%s: Launching the Virtex-II Reader...\n", 215 __FUNCTION__); 216 ret_val = Virtex2_dump (desc, buf, bsize); 217 #else 218 printf ("%s: No support for Virtex-II devices.\n", 219 __FUNCTION__); 220 #endif 221 break; 222 223 default: 224 printf ("%s: Unsupported family type, %d\n", 225 __FUNCTION__, desc->family); 226 } 227 228 return ret_val; 229 } 230 231 int xilinx_info (Xilinx_desc * desc) 232 { 233 int ret_val = FPGA_FAIL; 234 235 if (xilinx_validate (desc, (char *)__FUNCTION__)) { 236 printf ("Family: \t"); 237 switch (desc->family) { 238 case Xilinx_Spartan2: 239 printf ("Spartan-II\n"); 240 break; 241 case Xilinx_Spartan3: 242 printf ("Spartan-III\n"); 243 break; 244 case Xilinx_Virtex2: 245 printf ("Virtex-II\n"); 246 break; 247 /* Add new family types here */ 248 default: 249 printf ("Unknown family type, %d\n", desc->family); 250 } 251 252 printf ("Interface type:\t"); 253 switch (desc->iface) { 254 case slave_serial: 255 printf ("Slave Serial\n"); 256 break; 257 case master_serial: /* Not used */ 258 printf ("Master Serial\n"); 259 break; 260 case slave_parallel: 261 printf ("Slave Parallel\n"); 262 break; 263 case jtag_mode: /* Not used */ 264 printf ("JTAG Mode\n"); 265 break; 266 case slave_selectmap: 267 printf ("Slave SelectMap Mode\n"); 268 break; 269 case master_selectmap: 270 printf ("Master SelectMap Mode\n"); 271 break; 272 /* Add new interface types here */ 273 default: 274 printf ("Unsupported interface type, %d\n", desc->iface); 275 } 276 277 printf ("Device Size: \t%d bytes\n" 278 "Cookie: \t0x%x (%d)\n", 279 desc->size, desc->cookie, desc->cookie); 280 281 if (desc->iface_fns) { 282 printf ("Device Function Table @ 0x%p\n", desc->iface_fns); 283 switch (desc->family) { 284 case Xilinx_Spartan2: 285 #if defined(CONFIG_FPGA_SPARTAN2) 286 Spartan2_info (desc); 287 #else 288 /* just in case */ 289 printf ("%s: No support for Spartan-II devices.\n", 290 __FUNCTION__); 291 #endif 292 break; 293 case Xilinx_Spartan3: 294 #if defined(CONFIG_FPGA_SPARTAN3) 295 Spartan3_info (desc); 296 #else 297 /* just in case */ 298 printf ("%s: No support for Spartan-III devices.\n", 299 __FUNCTION__); 300 #endif 301 break; 302 case Xilinx_Virtex2: 303 #if defined(CONFIG_FPGA_VIRTEX2) 304 Virtex2_info (desc); 305 #else 306 /* just in case */ 307 printf ("%s: No support for Virtex-II devices.\n", 308 __FUNCTION__); 309 #endif 310 break; 311 /* Add new family types here */ 312 default: 313 /* we don't need a message here - we give one up above */ 314 ; 315 } 316 } else 317 printf ("No Device Function Table.\n"); 318 319 ret_val = FPGA_SUCCESS; 320 } else { 321 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 322 } 323 324 return ret_val; 325 } 326 327 /* ------------------------------------------------------------------------- */ 328 329 static int xilinx_validate (Xilinx_desc * desc, char *fn) 330 { 331 int ret_val = false; 332 333 if (desc) { 334 if ((desc->family > min_xilinx_type) && 335 (desc->family < max_xilinx_type)) { 336 if ((desc->iface > min_xilinx_iface_type) && 337 (desc->iface < max_xilinx_iface_type)) { 338 if (desc->size) { 339 ret_val = true; 340 } else 341 printf ("%s: NULL part size\n", fn); 342 } else 343 printf ("%s: Invalid Interface type, %d\n", 344 fn, desc->iface); 345 } else 346 printf ("%s: Invalid family type, %d\n", fn, desc->family); 347 } else 348 printf ("%s: NULL descriptor!\n", fn); 349 350 return ret_val; 351 } 352