1 /* 2 * (C) Copyright 2003 3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de 4 * 5 * (C) Copyright 2002 6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 /* 12 * Altera FPGA support 13 */ 14 #include <common.h> 15 #include <errno.h> 16 #include <ACEX1K.h> 17 #include <stratixII.h> 18 19 /* Define FPGA_DEBUG to 1 to get debug printf's */ 20 #define FPGA_DEBUG 0 21 22 static const struct altera_fpga { 23 enum altera_family family; 24 const char *name; 25 int (*load)(Altera_desc *, const void *, size_t); 26 int (*dump)(Altera_desc *, const void *, size_t); 27 int (*info)(Altera_desc *); 28 } altera_fpga[] = { 29 #if defined(CONFIG_FPGA_ACEX1K) 30 { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, 31 { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, 32 #elif defined(CONFIG_FPGA_CYCLON2) 33 { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, 34 { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, 35 #endif 36 #if defined(CONFIG_FPGA_STRATIX_II) 37 { Altera_StratixII, "StratixII", StratixII_load, 38 StratixII_dump, StratixII_info }, 39 #endif 40 #if defined(CONFIG_FPGA_SOCFPGA) 41 { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL }, 42 #endif 43 }; 44 45 static int altera_validate(Altera_desc *desc, const char *fn) 46 { 47 if (!desc) { 48 printf("%s: NULL descriptor!\n", fn); 49 return -EINVAL; 50 } 51 52 if ((desc->family < min_altera_type) || 53 (desc->family > max_altera_type)) { 54 printf("%s: Invalid family type, %d\n", fn, desc->family); 55 return -EINVAL; 56 } 57 58 if ((desc->iface < min_altera_iface_type) || 59 (desc->iface > max_altera_iface_type)) { 60 printf("%s: Invalid Interface type, %d\n", fn, desc->iface); 61 return -EINVAL; 62 } 63 64 if (!desc->size) { 65 printf("%s: NULL part size\n", fn); 66 return -EINVAL; 67 } 68 69 return 0; 70 } 71 72 static const struct altera_fpga * 73 altera_desc_to_fpga(Altera_desc *desc, const char *fn) 74 { 75 int i; 76 77 if (altera_validate(desc, fn)) { 78 printf("%s: Invalid device descriptor\n", fn); 79 return NULL; 80 } 81 82 for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) { 83 if (desc->family == altera_fpga[i].family) 84 break; 85 } 86 87 if (i == ARRAY_SIZE(altera_fpga)) { 88 printf("%s: Unsupported family type, %d\n", fn, desc->family); 89 return NULL; 90 } 91 92 return &altera_fpga[i]; 93 } 94 95 int altera_load(Altera_desc *desc, const void *buf, size_t bsize) 96 { 97 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); 98 99 if (!fpga) 100 return FPGA_FAIL; 101 102 debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n", 103 __func__, fpga->name); 104 if (fpga->load) 105 return fpga->load(desc, buf, bsize); 106 return 0; 107 } 108 109 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) 110 { 111 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); 112 113 if (!fpga) 114 return FPGA_FAIL; 115 116 debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n", 117 __func__, fpga->name); 118 if (fpga->dump) 119 return fpga->dump(desc, buf, bsize); 120 return 0; 121 } 122 123 int altera_info(Altera_desc *desc) 124 { 125 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); 126 127 if (!fpga) 128 return FPGA_FAIL; 129 130 printf("Family: \t%s\n", fpga->name); 131 132 printf("Interface type:\t"); 133 switch (desc->iface) { 134 case passive_serial: 135 printf("Passive Serial (PS)\n"); 136 break; 137 case passive_parallel_synchronous: 138 printf("Passive Parallel Synchronous (PPS)\n"); 139 break; 140 case passive_parallel_asynchronous: 141 printf("Passive Parallel Asynchronous (PPA)\n"); 142 break; 143 case passive_serial_asynchronous: 144 printf("Passive Serial Asynchronous (PSA)\n"); 145 break; 146 case altera_jtag_mode: /* Not used */ 147 printf("JTAG Mode\n"); 148 break; 149 case fast_passive_parallel: 150 printf("Fast Passive Parallel (FPP)\n"); 151 break; 152 case fast_passive_parallel_security: 153 printf("Fast Passive Parallel with Security (FPPS)\n"); 154 break; 155 /* Add new interface types here */ 156 default: 157 printf("Unsupported interface type, %d\n", desc->iface); 158 } 159 160 printf("Device Size: \t%zd bytes\n" 161 "Cookie: \t0x%x (%d)\n", 162 desc->size, desc->cookie, desc->cookie); 163 164 if (desc->iface_fns) { 165 printf("Device Function Table @ 0x%p\n", desc->iface_fns); 166 if (fpga->info) 167 fpga->info(desc); 168 } else { 169 printf("No Device Function Table.\n"); 170 } 171 172 return FPGA_SUCCESS; 173 } 174