1 /* 2 * (C) Copyright 2003 3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de 4 * 5 * (C) Copyright 2002 6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 /* 12 * Altera FPGA support 13 */ 14 #include <common.h> 15 #include <ACEX1K.h> 16 #include <stratixII.h> 17 18 /* Define FPGA_DEBUG to get debug printf's */ 19 /* #define FPGA_DEBUG */ 20 21 #ifdef FPGA_DEBUG 22 #define PRINTF(fmt,args...) printf (fmt ,##args) 23 #else 24 #define PRINTF(fmt,args...) 25 #endif 26 27 /* Local Static Functions */ 28 static int altera_validate (Altera_desc * desc, const char *fn); 29 30 /* ------------------------------------------------------------------------- */ 31 int altera_load(Altera_desc *desc, const void *buf, size_t bsize) 32 { 33 int ret_val = FPGA_FAIL; /* assume a failure */ 34 35 if (!altera_validate (desc, (char *)__FUNCTION__)) { 36 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 37 } else { 38 switch (desc->family) { 39 case Altera_ACEX1K: 40 case Altera_CYC2: 41 #if defined(CONFIG_FPGA_ACEX1K) 42 PRINTF ("%s: Launching the ACEX1K Loader...\n", 43 __FUNCTION__); 44 ret_val = ACEX1K_load (desc, buf, bsize); 45 #elif defined(CONFIG_FPGA_CYCLON2) 46 PRINTF ("%s: Launching the CYCLONE II Loader...\n", 47 __FUNCTION__); 48 ret_val = CYC2_load (desc, buf, bsize); 49 #else 50 printf ("%s: No support for ACEX1K devices.\n", 51 __FUNCTION__); 52 #endif 53 break; 54 55 #if defined(CONFIG_FPGA_STRATIX_II) 56 case Altera_StratixII: 57 PRINTF ("%s: Launching the Stratix II Loader...\n", 58 __FUNCTION__); 59 ret_val = StratixII_load (desc, buf, bsize); 60 break; 61 #endif 62 default: 63 printf ("%s: Unsupported family type, %d\n", 64 __FUNCTION__, desc->family); 65 } 66 } 67 68 return ret_val; 69 } 70 71 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) 72 { 73 int ret_val = FPGA_FAIL; /* assume a failure */ 74 75 if (!altera_validate (desc, (char *)__FUNCTION__)) { 76 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 77 } else { 78 switch (desc->family) { 79 case Altera_ACEX1K: 80 #if defined(CONFIG_FPGA_ACEX) 81 PRINTF ("%s: Launching the ACEX1K Reader...\n", 82 __FUNCTION__); 83 ret_val = ACEX1K_dump (desc, buf, bsize); 84 #else 85 printf ("%s: No support for ACEX1K devices.\n", 86 __FUNCTION__); 87 #endif 88 break; 89 90 #if defined(CONFIG_FPGA_STRATIX_II) 91 case Altera_StratixII: 92 PRINTF ("%s: Launching the Stratix II Reader...\n", 93 __FUNCTION__); 94 ret_val = StratixII_dump (desc, buf, bsize); 95 break; 96 #endif 97 default: 98 printf ("%s: Unsupported family type, %d\n", 99 __FUNCTION__, desc->family); 100 } 101 } 102 103 return ret_val; 104 } 105 106 int altera_info( Altera_desc *desc ) 107 { 108 int ret_val = FPGA_FAIL; 109 110 if (altera_validate (desc, (char *)__FUNCTION__)) { 111 printf ("Family: \t"); 112 switch (desc->family) { 113 case Altera_ACEX1K: 114 printf ("ACEX1K\n"); 115 break; 116 case Altera_CYC2: 117 printf ("CYCLON II\n"); 118 break; 119 case Altera_StratixII: 120 printf ("Stratix II\n"); 121 break; 122 /* Add new family types here */ 123 default: 124 printf ("Unknown family type, %d\n", desc->family); 125 } 126 127 printf ("Interface type:\t"); 128 switch (desc->iface) { 129 case passive_serial: 130 printf ("Passive Serial (PS)\n"); 131 break; 132 case passive_parallel_synchronous: 133 printf ("Passive Parallel Synchronous (PPS)\n"); 134 break; 135 case passive_parallel_asynchronous: 136 printf ("Passive Parallel Asynchronous (PPA)\n"); 137 break; 138 case passive_serial_asynchronous: 139 printf ("Passive Serial Asynchronous (PSA)\n"); 140 break; 141 case altera_jtag_mode: /* Not used */ 142 printf ("JTAG Mode\n"); 143 break; 144 case fast_passive_parallel: 145 printf ("Fast Passive Parallel (FPP)\n"); 146 break; 147 case fast_passive_parallel_security: 148 printf 149 ("Fast Passive Parallel with Security (FPPS) \n"); 150 break; 151 /* Add new interface types here */ 152 default: 153 printf ("Unsupported interface type, %d\n", desc->iface); 154 } 155 156 printf ("Device Size: \t%d bytes\n" 157 "Cookie: \t0x%x (%d)\n", 158 desc->size, desc->cookie, desc->cookie); 159 160 if (desc->iface_fns) { 161 printf ("Device Function Table @ 0x%p\n", desc->iface_fns); 162 switch (desc->family) { 163 case Altera_ACEX1K: 164 case Altera_CYC2: 165 #if defined(CONFIG_FPGA_ACEX1K) 166 ACEX1K_info (desc); 167 #elif defined(CONFIG_FPGA_CYCLON2) 168 CYC2_info (desc); 169 #else 170 /* just in case */ 171 printf ("%s: No support for ACEX1K devices.\n", 172 __FUNCTION__); 173 #endif 174 break; 175 #if defined(CONFIG_FPGA_STRATIX_II) 176 case Altera_StratixII: 177 StratixII_info (desc); 178 break; 179 #endif 180 /* Add new family types here */ 181 default: 182 /* we don't need a message here - we give one up above */ 183 break; 184 } 185 } else { 186 printf ("No Device Function Table.\n"); 187 } 188 189 ret_val = FPGA_SUCCESS; 190 } else { 191 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 192 } 193 194 return ret_val; 195 } 196 197 /* ------------------------------------------------------------------------- */ 198 199 static int altera_validate (Altera_desc * desc, const char *fn) 200 { 201 int ret_val = false; 202 203 if (desc) { 204 if ((desc->family > min_altera_type) && 205 (desc->family < max_altera_type)) { 206 if ((desc->iface > min_altera_iface_type) && 207 (desc->iface < max_altera_iface_type)) { 208 if (desc->size) { 209 ret_val = true; 210 } else { 211 printf ("%s: NULL part size\n", fn); 212 } 213 } else { 214 printf ("%s: Invalid Interface type, %d\n", 215 fn, desc->iface); 216 } 217 } else { 218 printf ("%s: Invalid family type, %d\n", fn, desc->family); 219 } 220 } else { 221 printf ("%s: NULL descriptor!\n", fn); 222 } 223 224 return ret_val; 225 } 226 227 /* ------------------------------------------------------------------------- */ 228