xref: /openbmc/u-boot/drivers/fpga/Makefile (revision 6b245014)
1c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD#
2c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD# (C) Copyright 2008
3c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD#
51a459660SWolfgang Denk# SPDX-License-Identifier:	GPL-2.0+
6c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD#
7c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD
8710f1d3dSMasahiro Yamadaobj-y += fpga.o
9710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
10710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
11710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
12710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
13*6b245014SSiva Durga Prasad Paladuguobj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o
14710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_XILINX) += xilinx.o
15710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
16c8aa7dfcSJean-Christophe PLAGNIOL-VILLARDifdef CONFIG_FPGA_ALTERA
17710f1d3dSMasahiro Yamadaobj-y += altera.o
18710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
19710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
20710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
21ff9c4c53SStefan Roeseobj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
22230fe9b2SPavel Machekobj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
23c8aa7dfcSJean-Christophe PLAGNIOL-VILLARDendif
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