183d290c5STom Rini# SPDX-License-Identifier: GPL-2.0+ 2c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD# 3c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD# (C) Copyright 2008 4c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD# Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 6710f1d3dSMasahiro Yamadaobj-y += fpga.o 7710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o 8710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o 9710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o 10710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o 116b245014SSiva Durga Prasad Paladuguobj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o 12710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_XILINX) += xilinx.o 13710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o 14c8aa7dfcSJean-Christophe PLAGNIOL-VILLARDifdef CONFIG_FPGA_ALTERA 15710f1d3dSMasahiro Yamadaobj-y += altera.o 16710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o 17710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o 18710f1d3dSMasahiro Yamadaobj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o 19ff9c4c53SStefan Roeseobj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o 20*c41e660bSAng, Chee Hongobj-$(CONFIG_FPGA_STRATIX10) += stratix10.o 21230fe9b2SPavel Machekobj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o 226867e19aSTien Fong Cheeobj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o 232baa9972STien Fong Cheeobj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o 24c8aa7dfcSJean-Christophe PLAGNIOL-VILLARDendif 25