xref: /openbmc/u-boot/drivers/firmware/ti_sci.h (revision dd1033e4)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*
3  * Texas Instruments System Control Interface (TISCI) Protocol
4  *
5  * Communication protocol with TI SCI hardware
6  * The system works in a message response protocol
7  * See: http://processors.wiki.ti.com/index.php/TISCI for details
8  *
9  * Copyright (C)  2018 Texas Instruments Incorporated - http://www.ti.com/
10  * Based on drivers/firmware/ti_sci.h from Linux.
11  *
12  */
13 
14 #ifndef __TI_SCI_H
15 #define __TI_SCI_H
16 
17 /* Generic Messages */
18 #define TI_SCI_MSG_ENABLE_WDT		0x0000
19 #define TI_SCI_MSG_WAKE_RESET		0x0001
20 #define TI_SCI_MSG_VERSION		0x0002
21 #define TI_SCI_MSG_WAKE_REASON		0x0003
22 #define TI_SCI_MSG_GOODBYE		0x0004
23 #define TI_SCI_MSG_SYS_RESET		0x0005
24 #define TI_SCI_MSG_BOARD_CONFIG		0x000b
25 #define TI_SCI_MSG_BOARD_CONFIG_RM	0x000c
26 #define TI_SCI_MSG_BOARD_CONFIG_SECURITY  0x000d
27 #define TI_SCI_MSG_BOARD_CONFIG_PM	0x000e
28 
29 /* Device requests */
30 #define TI_SCI_MSG_SET_DEVICE_STATE	0x0200
31 #define TI_SCI_MSG_GET_DEVICE_STATE	0x0201
32 #define TI_SCI_MSG_SET_DEVICE_RESETS	0x0202
33 
34 /* Clock requests */
35 #define TI_SCI_MSG_SET_CLOCK_STATE	0x0100
36 #define TI_SCI_MSG_GET_CLOCK_STATE	0x0101
37 #define TI_SCI_MSG_SET_CLOCK_PARENT	0x0102
38 #define TI_SCI_MSG_GET_CLOCK_PARENT	0x0103
39 #define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104
40 #define TI_SCI_MSG_SET_CLOCK_FREQ	0x010c
41 #define TI_SCI_MSG_QUERY_CLOCK_FREQ	0x010d
42 #define TI_SCI_MSG_GET_CLOCK_FREQ	0x010e
43 
44 /* Processor Control Messages */
45 #define TISCI_MSG_PROC_REQUEST		0xc000
46 #define TISCI_MSG_PROC_RELEASE		0xc001
47 #define TISCI_MSG_PROC_HANDOVER		0xc005
48 #define TISCI_MSG_SET_PROC_BOOT_CONFIG	0xc100
49 #define TISCI_MSG_SET_PROC_BOOT_CTRL	0xc101
50 #define TISCI_MSG_PROC_AUTH_BOOT_IMIAGE	0xc120
51 #define TISCI_MSG_GET_PROC_BOOT_STATUS	0xc400
52 
53 /**
54  * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses
55  * @type:	Type of messages: One of TI_SCI_MSG* values
56  * @host:	Host of the message
57  * @seq:	Message identifier indicating a transfer sequence
58  * @flags:	Flag for the message
59  */
60 struct ti_sci_msg_hdr {
61 	u16 type;
62 	u8 host;
63 	u8 seq;
64 #define TI_SCI_MSG_FLAG(val)			(1 << (val))
65 #define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE	0x0
66 #define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED		TI_SCI_MSG_FLAG(0)
67 #define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED	TI_SCI_MSG_FLAG(1)
68 #define TI_SCI_FLAG_RESP_GENERIC_NACK		0x0
69 #define TI_SCI_FLAG_RESP_GENERIC_ACK		TI_SCI_MSG_FLAG(1)
70 	/* Additional Flags */
71 	u32 flags;
72 } __packed;
73 
74 /**
75  * struct ti_sci_secure_msg_hdr - Header that prefixes all TISCI messages sent
76  *				  via secure transport.
77  * @checksum:	crc16 checksum for the entire message
78  * @reserved:	Reserved for future use.
79  */
80 struct ti_sci_secure_msg_hdr {
81 	u16 checksum;
82 	u16 reserved;
83 } __packed;
84 
85 /**
86  * struct ti_sci_msg_resp_version - Response for a message
87  * @hdr:		Generic header
88  * @firmware_description: String describing the firmware
89  * @firmware_revision:	Firmware revision
90  * @abi_major:		Major version of the ABI that firmware supports
91  * @abi_minor:		Minor version of the ABI that firmware supports
92  *
93  * In general, ABI version changes follow the rule that minor version increments
94  * are backward compatible. Major revision changes in ABI may not be
95  * backward compatible.
96  *
97  * Response to a generic message with message type TI_SCI_MSG_VERSION
98  */
99 struct ti_sci_msg_resp_version {
100 	struct ti_sci_msg_hdr hdr;
101 	char firmware_description[32];
102 	u16 firmware_revision;
103 	u8 abi_major;
104 	u8 abi_minor;
105 } __packed;
106 
107 /**
108  * struct ti_sci_msg_req_reboot - Reboot the SoC
109  * @hdr:	Generic Header
110  *
111  * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic
112  * ACK/NACK message.
113  */
114 struct ti_sci_msg_req_reboot {
115 	struct ti_sci_msg_hdr hdr;
116 } __packed;
117 
118 /**
119  * struct ti_sci_msg_board_config - Board configuration message
120  * @hdr:		Generic Header
121  * @boardcfgp_low:	Lower 32 bit of the pointer pointing to the board
122  *			configuration data
123  * @boardcfgp_high:	Upper 32 bit of the pointer pointing to the board
124  *			configuration data
125  * @boardcfg_size:	Size of board configuration data object
126  * Request type is TI_SCI_MSG_BOARD_CONFIG, responded with a generic
127  * ACK/NACK message.
128  */
129 struct ti_sci_msg_board_config {
130 	struct ti_sci_msg_hdr hdr;
131 	u32 boardcfgp_low;
132 	u32 boardcfgp_high;
133 	u16 boardcfg_size;
134 } __packed;
135 
136 /**
137  * struct ti_sci_msg_req_set_device_state - Set the desired state of the device
138  * @hdr:		Generic header
139  * @id:	Indicates which device to modify
140  * @reserved: Reserved space in message, must be 0 for backward compatibility
141  * @state: The desired state of the device.
142  *
143  * Certain flags can also be set to alter the device state:
144  * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source.
145  * The meaning of this flag will vary slightly from device to device and from
146  * SoC to SoC but it generally allows the device to wake the SoC out of deep
147  * suspend states.
148  * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device.
149  * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed
150  * with STATE_RETENTION or STATE_ON, it will claim the device exclusively.
151  * If another host already has this device set to STATE_RETENTION or STATE_ON,
152  * the message will fail. Once successful, other hosts attempting to set
153  * STATE_RETENTION or STATE_ON will fail.
154  *
155  * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic
156  * ACK/NACK message.
157  */
158 struct ti_sci_msg_req_set_device_state {
159 	/* Additional hdr->flags options */
160 #define MSG_FLAG_DEVICE_WAKE_ENABLED	TI_SCI_MSG_FLAG(8)
161 #define MSG_FLAG_DEVICE_RESET_ISO	TI_SCI_MSG_FLAG(9)
162 #define MSG_FLAG_DEVICE_EXCLUSIVE	TI_SCI_MSG_FLAG(10)
163 	struct ti_sci_msg_hdr hdr;
164 	u32 id;
165 	u32 reserved;
166 
167 #define MSG_DEVICE_SW_STATE_AUTO_OFF	0
168 #define MSG_DEVICE_SW_STATE_RETENTION	1
169 #define MSG_DEVICE_SW_STATE_ON		2
170 	u8 state;
171 } __packed;
172 
173 /**
174  * struct ti_sci_msg_req_get_device_state - Request to get device.
175  * @hdr:		Generic header
176  * @id:		Device Identifier
177  *
178  * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state
179  * information
180  */
181 struct ti_sci_msg_req_get_device_state {
182 	struct ti_sci_msg_hdr hdr;
183 	u32 id;
184 } __packed;
185 
186 /**
187  * struct ti_sci_msg_resp_get_device_state - Response to get device request.
188  * @hdr:		Generic header
189  * @context_loss_count: Indicates how many times the device has lost context. A
190  *	driver can use this monotonic counter to determine if the device has
191  *	lost context since the last time this message was exchanged.
192  * @resets: Programmed state of the reset lines.
193  * @programmed_state:	The state as programmed by set_device.
194  *			- Uses the MSG_DEVICE_SW_* macros
195  * @current_state:	The actual state of the hardware.
196  *
197  * Response to request TI_SCI_MSG_GET_DEVICE_STATE.
198  */
199 struct ti_sci_msg_resp_get_device_state {
200 	struct ti_sci_msg_hdr hdr;
201 	u32 context_loss_count;
202 	u32 resets;
203 	u8 programmed_state;
204 #define MSG_DEVICE_HW_STATE_OFF		0
205 #define MSG_DEVICE_HW_STATE_ON		1
206 #define MSG_DEVICE_HW_STATE_TRANS	2
207 	u8 current_state;
208 } __packed;
209 
210 /**
211  * struct ti_sci_msg_req_set_device_resets - Set the desired resets
212  *				configuration of the device
213  * @hdr:		Generic header
214  * @id:	Indicates which device to modify
215  * @resets: A bit field of resets for the device. The meaning, behavior,
216  *	and usage of the reset flags are device specific. 0 for a bit
217  *	indicates releasing the reset represented by that bit while 1
218  *	indicates keeping it held.
219  *
220  * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic
221  * ACK/NACK message.
222  */
223 struct ti_sci_msg_req_set_device_resets {
224 	struct ti_sci_msg_hdr hdr;
225 	u32 id;
226 	u32 resets;
227 } __packed;
228 
229 /**
230  * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state
231  * @hdr:	Generic Header, Certain flags can be set specific to the clocks:
232  *		MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified
233  *		via spread spectrum clocking.
234  *		MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's
235  *		frequency to be changed while it is running so long as it
236  *		is within the min/max limits.
237  *		MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this
238  *		is only applicable to clock inputs on the SoC pseudo-device.
239  * @dev_id:	Device identifier this request is for
240  * @clk_id:	Clock identifier for the device for this request.
241  *		Each device has it's own set of clock inputs. This indexes
242  *		which clock input to modify.
243  * @request_state: Request the state for the clock to be set to.
244  *		MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock,
245  *		it can be disabled, regardless of the state of the device
246  *		MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to
247  *		automatically manage the state of this clock. If the device
248  *		is enabled, then the clock is enabled. If the device is set
249  *		to off or retention, then the clock is internally set as not
250  *		being required by the device.(default)
251  *		MSG_CLOCK_SW_STATE_REQ:  Configure the clock to be enabled,
252  *		regardless of the state of the device.
253  *
254  * Normally, all required clocks are managed by TISCI entity, this is used
255  * only for specific control *IF* required. Auto managed state is
256  * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote
257  * will explicitly control.
258  *
259  * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic
260  * ACK or NACK message.
261  */
262 struct ti_sci_msg_req_set_clock_state {
263 	/* Additional hdr->flags options */
264 #define MSG_FLAG_CLOCK_ALLOW_SSC		TI_SCI_MSG_FLAG(8)
265 #define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE	TI_SCI_MSG_FLAG(9)
266 #define MSG_FLAG_CLOCK_INPUT_TERM		TI_SCI_MSG_FLAG(10)
267 	struct ti_sci_msg_hdr hdr;
268 	u32 dev_id;
269 	u8 clk_id;
270 #define MSG_CLOCK_SW_STATE_UNREQ	0
271 #define MSG_CLOCK_SW_STATE_AUTO		1
272 #define MSG_CLOCK_SW_STATE_REQ		2
273 	u8 request_state;
274 } __packed;
275 
276 /**
277  * struct ti_sci_msg_req_get_clock_state - Request for clock state
278  * @hdr:	Generic Header
279  * @dev_id:	Device identifier this request is for
280  * @clk_id:	Clock identifier for the device for this request.
281  *		Each device has it's own set of clock inputs. This indexes
282  *		which clock input to get state of.
283  *
284  * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state
285  * of the clock
286  */
287 struct ti_sci_msg_req_get_clock_state {
288 	struct ti_sci_msg_hdr hdr;
289 	u32 dev_id;
290 	u8 clk_id;
291 } __packed;
292 
293 /**
294  * struct ti_sci_msg_resp_get_clock_state - Response to get clock state
295  * @hdr:	Generic Header
296  * @programmed_state: Any programmed state of the clock. This is one of
297  *		MSG_CLOCK_SW_STATE* values.
298  * @current_state: Current state of the clock. This is one of:
299  *		MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready
300  *		MSG_CLOCK_HW_STATE_READY: Clock is ready
301  *
302  * Response to TI_SCI_MSG_GET_CLOCK_STATE.
303  */
304 struct ti_sci_msg_resp_get_clock_state {
305 	struct ti_sci_msg_hdr hdr;
306 	u8 programmed_state;
307 #define MSG_CLOCK_HW_STATE_NOT_READY	0
308 #define MSG_CLOCK_HW_STATE_READY	1
309 	u8 current_state;
310 } __packed;
311 
312 /**
313  * struct ti_sci_msg_req_set_clock_parent - Set the clock parent
314  * @hdr:	Generic Header
315  * @dev_id:	Device identifier this request is for
316  * @clk_id:	Clock identifier for the device for this request.
317  *		Each device has it's own set of clock inputs. This indexes
318  *		which clock input to modify.
319  * @parent_id:	The new clock parent is selectable by an index via this
320  *		parameter.
321  *
322  * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic
323  * ACK / NACK message.
324  */
325 struct ti_sci_msg_req_set_clock_parent {
326 	struct ti_sci_msg_hdr hdr;
327 	u32 dev_id;
328 	u8 clk_id;
329 	u8 parent_id;
330 } __packed;
331 
332 /**
333  * struct ti_sci_msg_req_get_clock_parent - Get the clock parent
334  * @hdr:	Generic Header
335  * @dev_id:	Device identifier this request is for
336  * @clk_id:	Clock identifier for the device for this request.
337  *		Each device has it's own set of clock inputs. This indexes
338  *		which clock input to get the parent for.
339  *
340  * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information
341  */
342 struct ti_sci_msg_req_get_clock_parent {
343 	struct ti_sci_msg_hdr hdr;
344 	u32 dev_id;
345 	u8 clk_id;
346 } __packed;
347 
348 /**
349  * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent
350  * @hdr:	Generic Header
351  * @parent_id:	The current clock parent
352  *
353  * Response to TI_SCI_MSG_GET_CLOCK_PARENT.
354  */
355 struct ti_sci_msg_resp_get_clock_parent {
356 	struct ti_sci_msg_hdr hdr;
357 	u8 parent_id;
358 } __packed;
359 
360 /**
361  * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents
362  * @hdr:	Generic header
363  * @dev_id:	Device identifier this request is for
364  * @clk_id:	Clock identifier for the device for this request.
365  *
366  * This request provides information about how many clock parent options
367  * are available for a given clock to a device. This is typically used
368  * for input clocks.
369  *
370  * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate
371  * message, or NACK in case of inability to satisfy request.
372  */
373 struct ti_sci_msg_req_get_clock_num_parents {
374 	struct ti_sci_msg_hdr hdr;
375 	u32 dev_id;
376 	u8 clk_id;
377 } __packed;
378 
379 /**
380  * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents
381  * @hdr:		Generic header
382  * @num_parents:	Number of clock parents
383  *
384  * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS
385  */
386 struct ti_sci_msg_resp_get_clock_num_parents {
387 	struct ti_sci_msg_hdr hdr;
388 	u8 num_parents;
389 } __packed;
390 
391 /**
392  * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency
393  * @hdr:	Generic Header
394  * @dev_id:	Device identifier this request is for
395  * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum
396  *		allowable programmed frequency and does not account for clock
397  *		tolerances and jitter.
398  * @target_freq_hz: The target clock frequency. A frequency will be found
399  *		as close to this target frequency as possible.
400  * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum
401  *		allowable programmed frequency and does not account for clock
402  *		tolerances and jitter.
403  * @clk_id:	Clock identifier for the device for this request.
404  *
405  * NOTE: Normally clock frequency management is automatically done by TISCI
406  * entity. In case of specific requests, TISCI evaluates capability to achieve
407  * requested frequency within provided range and responds with
408  * result message.
409  *
410  * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message,
411  * or NACK in case of inability to satisfy request.
412  */
413 struct ti_sci_msg_req_query_clock_freq {
414 	struct ti_sci_msg_hdr hdr;
415 	u32 dev_id;
416 	u64 min_freq_hz;
417 	u64 target_freq_hz;
418 	u64 max_freq_hz;
419 	u8 clk_id;
420 } __packed;
421 
422 /**
423  * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query
424  * @hdr:	Generic Header
425  * @freq_hz:	Frequency that is the best match in Hz.
426  *
427  * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request
428  * cannot be satisfied, the message will be of type NACK.
429  */
430 struct ti_sci_msg_resp_query_clock_freq {
431 	struct ti_sci_msg_hdr hdr;
432 	u64 freq_hz;
433 } __packed;
434 
435 /**
436  * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency
437  * @hdr:	Generic Header
438  * @dev_id:	Device identifier this request is for
439  * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum
440  *		allowable programmed frequency and does not account for clock
441  *		tolerances and jitter.
442  * @target_freq_hz: The target clock frequency. The clock will be programmed
443  *		at a rate as close to this target frequency as possible.
444  * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum
445  *		allowable programmed frequency and does not account for clock
446  *		tolerances and jitter.
447  * @clk_id:	Clock identifier for the device for this request.
448  *
449  * NOTE: Normally clock frequency management is automatically done by TISCI
450  * entity. In case of specific requests, TISCI evaluates capability to achieve
451  * requested range and responds with success/failure message.
452  *
453  * This sets the desired frequency for a clock within an allowable
454  * range. This message will fail on an enabled clock unless
455  * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally,
456  * if other clocks have their frequency modified due to this message,
457  * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled.
458  *
459  * Calling set frequency on a clock input to the SoC pseudo-device will
460  * inform the PMMC of that clock's frequency. Setting a frequency of
461  * zero will indicate the clock is disabled.
462  *
463  * Calling set frequency on clock outputs from the SoC pseudo-device will
464  * function similarly to setting the clock frequency on a device.
465  *
466  * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK
467  * message.
468  */
469 struct ti_sci_msg_req_set_clock_freq {
470 	struct ti_sci_msg_hdr hdr;
471 	u32 dev_id;
472 	u64 min_freq_hz;
473 	u64 target_freq_hz;
474 	u64 max_freq_hz;
475 	u8 clk_id;
476 } __packed;
477 
478 /**
479  * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency
480  * @hdr:	Generic Header
481  * @dev_id:	Device identifier this request is for
482  * @clk_id:	Clock identifier for the device for this request.
483  *
484  * NOTE: Normally clock frequency management is automatically done by TISCI
485  * entity. In some cases, clock frequencies are configured by host.
486  *
487  * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency
488  * that the clock is currently at.
489  */
490 struct ti_sci_msg_req_get_clock_freq {
491 	struct ti_sci_msg_hdr hdr;
492 	u32 dev_id;
493 	u8 clk_id;
494 } __packed;
495 
496 /**
497  * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request
498  * @hdr:	Generic Header
499  * @freq_hz:	Frequency that the clock is currently on, in Hz.
500  *
501  * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ.
502  */
503 struct ti_sci_msg_resp_get_clock_freq {
504 	struct ti_sci_msg_hdr hdr;
505 	u64 freq_hz;
506 } __packed;
507 
508 #define TISCI_ADDR_LOW_MASK		GENMASK_ULL(31, 0)
509 #define TISCI_ADDR_HIGH_MASK		GENMASK_ULL(63, 32)
510 #define TISCI_ADDR_HIGH_SHIFT		32
511 
512 /**
513  * struct ti_sci_msg_req_proc_request - Request a processor
514  *
515  * @hdr:		Generic Header
516  * @processor_id:	ID of processor
517  *
518  * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK
519  * message.
520  */
521 struct ti_sci_msg_req_proc_request {
522 	struct ti_sci_msg_hdr hdr;
523 	u8 processor_id;
524 } __packed;
525 
526 /**
527  * struct ti_sci_msg_req_proc_release - Release a processor
528  *
529  * @hdr:		Generic Header
530  * @processor_id:	ID of processor
531  *
532  * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK
533  * message.
534  */
535 struct ti_sci_msg_req_proc_release {
536 	struct ti_sci_msg_hdr hdr;
537 	u8 processor_id;
538 } __packed;
539 
540 /**
541  * struct ti_sci_msg_req_proc_handover - Handover a processor to a host
542  *
543  * @hdr:		Generic Header
544  * @processor_id:	ID of processor
545  * @host_id:		New Host we want to give control to
546  *
547  * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK
548  * message.
549  */
550 struct ti_sci_msg_req_proc_handover {
551 	struct ti_sci_msg_hdr hdr;
552 	u8 processor_id;
553 	u8 host_id;
554 } __packed;
555 
556 /* A53 Config Flags */
557 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN         0x00000001
558 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN      0x00000002
559 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN     0x00000004
560 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN    0x00000008
561 #define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32        0x00000100
562 
563 /* R5 Config Flags */
564 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN            0x00000001
565 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN         0x00000002
566 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP          0x00000100
567 #define PROC_BOOT_CFG_FLAG_R5_TEINIT            0x00000200
568 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN           0x00000400
569 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE       0x00000800
570 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN           0x00001000
571 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN           0x00002000
572 
573 /**
574  * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration
575  * @hdr:		Generic Header
576  * @processor_id:	ID of processor
577  * @bootvector_low:	Lower 32bit (Little Endian) of boot vector
578  * @bootvector_high:	Higher 32bit (Little Endian) of boot vector
579  * @config_flags_set:	Optional Processor specific Config Flags to set.
580  *			Setting a bit here implies required bit sets to 1.
581  * @config_flags_clear:	Optional Processor specific Config Flags to clear.
582  *			Setting a bit here implies required bit gets cleared.
583  *
584  * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic
585  * ACK/NACK message.
586  */
587 struct ti_sci_msg_req_set_proc_boot_config {
588 	struct ti_sci_msg_hdr hdr;
589 	u8 processor_id;
590 	u32 bootvector_low;
591 	u32 bootvector_high;
592 	u32 config_flags_set;
593 	u32 config_flags_clear;
594 } __packed;
595 
596 /* R5 Control Flags */
597 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT                0x00000001
598 
599 /**
600  * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags
601  * @hdr:		Generic Header
602  * @processor_id:	ID of processor
603  * @control_flags_set:	Optional Processor specific Control Flags to set.
604  *			Setting a bit here implies required bit sets to 1.
605  * @control_flags_clear:Optional Processor specific Control Flags to clear.
606  *			Setting a bit here implies required bit gets cleared.
607  *
608  * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK
609  * message.
610  */
611 struct ti_sci_msg_req_set_proc_boot_ctrl {
612 	struct ti_sci_msg_hdr hdr;
613 	u8 processor_id;
614 	u32 control_flags_set;
615 	u32 control_flags_clear;
616 } __packed;
617 
618 /**
619  * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image
620  * @hdr:		Generic Header
621  * @processor_id:	ID of processor
622  * @cert_addr_low:	Lower 32bit (Little Endian) of certificate
623  * @cert_addr_high:	Higher 32bit (Little Endian) of certificate
624  *
625  * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic
626  * ACK/NACK message.
627  */
628 struct ti_sci_msg_req_proc_auth_boot_image {
629 	struct ti_sci_msg_hdr hdr;
630 	u8 processor_id;
631 	u32 cert_addr_low;
632 	u32 cert_addr_high;
633 } __packed;
634 
635 /**
636  * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status
637  * @hdr:		Generic Header
638  * @processor_id:	ID of processor
639  *
640  * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate
641  * message, or NACK in case of inability to satisfy request.
642  */
643 struct ti_sci_msg_req_get_proc_boot_status {
644 	struct ti_sci_msg_hdr hdr;
645 	u8 processor_id;
646 } __packed;
647 
648 /* ARMv8 Status Flags */
649 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFE			0x00000001
650 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFI			0x00000002
651 
652 /* R5 Status Flags */
653 #define PROC_BOOT_STATUS_FLAG_R5_WFE			0x00000001
654 #define PROC_BOOT_STATUS_FLAG_R5_WFI			0x00000002
655 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED		0x00000004
656 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED	0x00000100
657 
658 /**
659  * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response
660  * @hdr:		Generic Header
661  * @processor_id:	ID of processor
662  * @bootvector_low:	Lower 32bit (Little Endian) of boot vector
663  * @bootvector_high:	Higher 32bit (Little Endian) of boot vector
664  * @config_flags:	Optional Processor specific Config Flags set.
665  * @control_flags:	Optional Processor specific Control Flags.
666  * @status_flags:	Optional Processor specific Status Flags set.
667  *
668  * Response to TISCI_MSG_GET_PROC_BOOT_STATUS.
669  */
670 struct ti_sci_msg_resp_get_proc_boot_status {
671 	struct ti_sci_msg_hdr hdr;
672 	u8 processor_id;
673 	u32 bootvector_low;
674 	u32 bootvector_high;
675 	u32 config_flags;
676 	u32 control_flags;
677 	u32 status_flags;
678 } __packed;
679 
680 #endif /* __TI_SCI_H */
681