1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) Marvell International Ltd. and its affiliates 4 */ 5 6 #ifndef __XOR_H 7 #define __XOR_H 8 9 #include "ddr3_hw_training.h" 10 11 #define MV_XOR_MAX_CHAN 4 /* total channels for all units together */ 12 13 /* 14 * This enumerator describes the type of functionality the XOR channel 15 * can have while using the same data structures. 16 */ 17 enum xor_type { 18 MV_XOR, /* XOR channel functions as XOR accelerator */ 19 MV_DMA, /* XOR channel functions as IDMA channel */ 20 MV_CRC32 /* XOR channel functions as CRC 32 calculator */ 21 }; 22 23 /* 24 * This enumerator describes the set of commands that can be applied on 25 * an engine (e.g. IDMA, XOR). Appling a comman depends on the current 26 * status (see MV_STATE enumerator) 27 * Start can be applied only when status is IDLE 28 * Stop can be applied only when status is IDLE, ACTIVE or PAUSED 29 * Pause can be applied only when status is ACTIVE 30 * Restart can be applied only when status is PAUSED 31 */ 32 enum mv_command { 33 MV_START, /* Start */ 34 MV_STOP, /* Stop */ 35 MV_PAUSE, /* Pause */ 36 MV_RESTART /* Restart */ 37 }; 38 39 /* 40 * This enumerator describes the set of state conditions. 41 * Moving from one state to other is stricted. 42 */ 43 enum mv_state { 44 MV_IDLE, 45 MV_ACTIVE, 46 MV_PAUSED, 47 MV_UNDEFINED_STATE 48 }; 49 50 /* XOR descriptor structure for CRC and DMA descriptor */ 51 struct crc_dma_desc { 52 u32 status; /* Successful descriptor execution indication */ 53 u32 crc32_result; /* Result of CRC-32 calculation */ 54 u32 desc_cmd; /* type of operation to be carried out on the data */ 55 u32 next_desc_ptr; /* Next descriptor address pointer */ 56 u32 byte_cnt; /* Size of source block part represented by the descriptor */ 57 u32 dst_addr; /* Destination Block address pointer (not used in CRC32 */ 58 u32 src_addr0; /* Mode: Source Block address pointer */ 59 u32 src_addr1; /* Mode: Source Block address pointer */ 60 } __packed; 61 62 void mv_xor_hal_init(u32 chan_num); 63 int mv_xor_state_get(u32 chan); 64 void mv_sys_xor_init(MV_DRAM_INFO *dram_info); 65 void mv_sys_xor_finish(void); 66 int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr); 67 int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high, 68 u32 init_val_low); 69 70 #endif /* __XOR_H */ 71