1da58dec8STom Rini# SPDX-License-Identifier: GPL-2.0 25614e71bSYork Sun# 3*83d290c5STom Rini# Copyright 2008-2014 Freescale Semiconductor, Inc. 45614e71bSYork Sun 55614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \ 65614e71bSYork Sun lc_common_dimm_params.o 75614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \ 85614e71bSYork Sun lc_common_dimm_params.o 95614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \ 105614e71bSYork Sun lc_common_dimm_params.o 1134e026f9SYork Sunobj-$(CONFIG_SYS_FSL_DDR4) += main.o util.o ctrl_regs.o options.o \ 1234e026f9SYork Sun lc_common_dimm_params.o 1334e026f9SYork Sun 145614e71bSYork Sunifdef CONFIG_DDR_SPD 155614e71bSYork SunSPD := y 165614e71bSYork Sunendif 175614e71bSYork Sunifdef CONFIG_SPD_EEPROM 185614e71bSYork SunSPD := y 195614e71bSYork Sunendif 205614e71bSYork Sunifdef SPD 215614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDR1) += ddr1_dimm_params.o 225614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDR2) += ddr2_dimm_params.o 235614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDR3) += ddr3_dimm_params.o 2434e026f9SYork Sunobj-$(CONFIG_SYS_FSL_DDR4) += ddr4_dimm_params.o 255614e71bSYork Sunendif 265614e71bSYork Sun 275614e71bSYork Sunobj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o 285614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o 295614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o 305614e71bSYork Sunobj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o 31d26e34c4SYork Sunobj-$(CONFIG_SYS_FSL_DDRC_86XX_GEN2) += mpc86xx_ddr.o 329ac4ffbdSYork Sunobj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3) += arm_ddr_gen3.o 3334e026f9SYork Sunobj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o 34b9e745bbSShengzhou Liuobj-$(CONFIG_SYS_FSL_MMDC) += fsl_mmdc.o 35