1*d26e34c4SYork Sunconfig SYS_FSL_DDR 2*d26e34c4SYork Sun bool 3*d26e34c4SYork Sun help 4*d26e34c4SYork Sun Select Freescale General DDR driver, shared between most Freescale 5*d26e34c4SYork Sun PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- 6*d26e34c4SYork Sun based Layerscape SoCs (such as ls2080a). 7*d26e34c4SYork Sun 8*d26e34c4SYork Sunconfig SYS_FSL_MMDC 9*d26e34c4SYork Sun bool 10*d26e34c4SYork Sun help 11*d26e34c4SYork Sun Select Freescale Multi Mode DDR controller (MMDC). 12*d26e34c4SYork Sun 13*d26e34c4SYork Sunconfig SYS_FSL_DDR_BE 14*d26e34c4SYork Sun bool 15*d26e34c4SYork Sun help 16*d26e34c4SYork Sun Access DDR registers in big-endian 17*d26e34c4SYork Sun 18*d26e34c4SYork Sunconfig SYS_FSL_DDR_LE 19*d26e34c4SYork Sun bool 20*d26e34c4SYork Sun help 21*d26e34c4SYork Sun Access DDR registers in little-endian 22*d26e34c4SYork Sun 23*d26e34c4SYork Sunmenu "Freescale DDR controllers" 24*d26e34c4SYork Sun depends on SYS_FSL_DDR 25*d26e34c4SYork Sun 26*d26e34c4SYork Sunconfig SYS_FSL_DDR_VER 27*d26e34c4SYork Sun int 28*d26e34c4SYork Sun default 50 if SYS_FSL_DDR_VER_50 29*d26e34c4SYork Sun default 47 if SYS_FSL_DDR_VER_47 30*d26e34c4SYork Sun default 46 if SYS_FSL_DDR_VER_46 31*d26e34c4SYork Sun default 44 if SYS_FSL_DDR_VER_44 32*d26e34c4SYork Sun 33*d26e34c4SYork Sunconfig SYS_FSL_DDR_VER_50 34*d26e34c4SYork Sun bool 35*d26e34c4SYork Sun 36*d26e34c4SYork Sunconfig SYS_FSL_DDR_VER_47 37*d26e34c4SYork Sun bool 38*d26e34c4SYork Sun 39*d26e34c4SYork Sunconfig SYS_FSL_DDR_VER_46 40*d26e34c4SYork Sun bool 41*d26e34c4SYork Sun 42*d26e34c4SYork Sunconfig SYS_FSL_DDR_VER_44 43*d26e34c4SYork Sun bool 44*d26e34c4SYork Sun 45*d26e34c4SYork Sunconfig SYS_FSL_DDRC_GEN1 46*d26e34c4SYork Sun bool 47*d26e34c4SYork Sun help 48*d26e34c4SYork Sun Enable Freescale DDR controller. 49*d26e34c4SYork Sun 50*d26e34c4SYork Sunconfig SYS_FSL_DDRC_GEN2 51*d26e34c4SYork Sun bool 52*d26e34c4SYork Sun depends on !MPC86xx 53*d26e34c4SYork Sun help 54*d26e34c4SYork Sun Enable Freescale DDR2 controller. 55*d26e34c4SYork Sun 56*d26e34c4SYork Sunconfig SYS_FSL_DDRC_86XX_GEN2 57*d26e34c4SYork Sun bool 58*d26e34c4SYork Sun depends on MPC86xx 59*d26e34c4SYork Sun help 60*d26e34c4SYork Sun Enable Freescale DDR2 controller for MPC86xx SoCs. 61*d26e34c4SYork Sun 62*d26e34c4SYork Sunconfig SYS_FSL_DDRC_GEN3 63*d26e34c4SYork Sun bool 64*d26e34c4SYork Sun depends on PPC 65*d26e34c4SYork Sun help 66*d26e34c4SYork Sun Enable Freescale DDR3 controller for PowerPC SoCs. 67*d26e34c4SYork Sun 68*d26e34c4SYork Sunconfig SYS_FSL_DDRC_ARM_GEN3 69*d26e34c4SYork Sun bool 70*d26e34c4SYork Sun depends on ARM 71*d26e34c4SYork Sun help 72*d26e34c4SYork Sun Enable Freescale DDR3 controller for ARM SoCs. 73*d26e34c4SYork Sun 74*d26e34c4SYork Sunconfig SYS_FSL_DDRC_GEN4 75*d26e34c4SYork Sun bool 76*d26e34c4SYork Sun help 77*d26e34c4SYork Sun Enable Freescale DDR4 controller. 78*d26e34c4SYork Sun 79*d26e34c4SYork Sunconfig SYS_FSL_HAS_DDR4 80*d26e34c4SYork Sun bool 81*d26e34c4SYork Sun 82*d26e34c4SYork Sunconfig SYS_FSL_HAS_DDR3 83*d26e34c4SYork Sun bool 84*d26e34c4SYork Sun 85*d26e34c4SYork Sunconfig SYS_FSL_HAS_DDR2 86*d26e34c4SYork Sun bool 87*d26e34c4SYork Sun 88*d26e34c4SYork Sunconfig SYS_FSL_HAS_DDR1 89*d26e34c4SYork Sun bool 90*d26e34c4SYork Sun 91*d26e34c4SYork Sunchoice 92*d26e34c4SYork Sun prompt "DDR technology" 93*d26e34c4SYork Sun default SYS_FSL_DDR4 if SYS_FSL_HAS_DDR4 94*d26e34c4SYork Sun default SYS_FSL_DDR3 if SYS_FSL_HAS_DDR3 95*d26e34c4SYork Sun default SYS_FSL_DDR2 if SYS_FSL_HAS_DDR2 96*d26e34c4SYork Sun default SYS_FSL_DDR1 if SYS_FSL_HAS_DDR1 97*d26e34c4SYork Sun 98*d26e34c4SYork Sunconfig SYS_FSL_DDR4 99*d26e34c4SYork Sun bool "Freescale DDR4 controller" 100*d26e34c4SYork Sun depends on SYS_FSL_HAS_DDR4 101*d26e34c4SYork Sun select SYS_FSL_DDRC_GEN4 102*d26e34c4SYork Sun 103*d26e34c4SYork Sunconfig SYS_FSL_DDR3 104*d26e34c4SYork Sun bool "Freescale DDR3 controller" 105*d26e34c4SYork Sun depends on SYS_FSL_HAS_DDR3 106*d26e34c4SYork Sun select SYS_FSL_DDRC_GEN3 if PPC 107*d26e34c4SYork Sun select SYS_FSL_DDRC_ARM_GEN3 if ARM 108*d26e34c4SYork Sun 109*d26e34c4SYork Sunconfig SYS_FSL_DDR2 110*d26e34c4SYork Sun bool "Freescale DDR2 controller" 111*d26e34c4SYork Sun depends on SYS_FSL_HAS_DDR2 112*d26e34c4SYork Sun select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3) 113*d26e34c4SYork Sun select SYS_FSL_DDRC_86XX_GEN2 if MPC86xx 114*d26e34c4SYork Sun 115*d26e34c4SYork Sunconfig SYS_FSL_DDR1 116*d26e34c4SYork Sun bool "Freescale DDR1 controller" 117*d26e34c4SYork Sun depends on SYS_FSL_HAS_DDR1 118*d26e34c4SYork Sun select SYS_FSL_DDRC_GEN1 119*d26e34c4SYork Sun 120*d26e34c4SYork Sunendchoice 121*d26e34c4SYork Sun 122*d26e34c4SYork Sunendmenu 123