xref: /openbmc/u-boot/drivers/crypto/fsl/jr.h (revision 610751e9)
1 /*
2  * Copyright 2008-2014 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  *
6  */
7 
8 #ifndef __JR_H
9 #define __JR_H
10 
11 #include <linux/compiler.h>
12 
13 #define JR_SIZE 4
14 /* Timeout currently defined as 90 sec */
15 #define CONFIG_SEC_DEQ_TIMEOUT	90000000U
16 
17 #define DEFAULT_JR_ID		0
18 #define DEFAULT_JR_LIODN	0
19 #define DEFAULT_IRQ		0	/* Interrupts not to be configured */
20 
21 #define MCFGR_SWRST       ((uint32_t)(1)<<31) /* Software Reset */
22 #define MCFGR_DMA_RST     ((uint32_t)(1)<<28) /* DMA Reset */
23 #define MCFGR_PS_SHIFT          16
24 #define MCFGR_AWCACHE_SHIFT	8
25 #define MCFGR_AWCACHE_MASK	(0xf << MCFGR_AWCACHE_SHIFT)
26 #define JR_INTMASK	  0x00000001
27 #define JRCR_RESET                  0x01
28 #define JRINT_ERR_HALT_INPROGRESS   0x4
29 #define JRINT_ERR_HALT_MASK         0xc
30 #define JRNSLIODN_SHIFT		16
31 #define JRNSLIODN_MASK		0x0fff0000
32 #define JRSLIODN_SHIFT		0
33 #define JRSLIODN_MASK		0x00000fff
34 
35 #define JQ_DEQ_ERR		-1
36 #define JQ_DEQ_TO_ERR		-2
37 #define JQ_ENQ_ERR		-3
38 
39 struct op_ring {
40 	dma_addr_t desc;
41 	uint32_t status;
42 } __packed;
43 
44 struct jr_info {
45 	void (*callback)(dma_addr_t desc, uint32_t status, void *arg);
46 	dma_addr_t desc_phys_addr;
47 	uint32_t desc_addr;
48 	uint32_t desc_len;
49 	uint32_t op_done;
50 	void *arg;
51 };
52 
53 struct jobring {
54 	int jq_id;
55 	int irq;
56 	int liodn;
57 	/* Head is the index where software would enq the descriptor in
58 	 * the i/p ring
59 	 */
60 	int head;
61 	/* Tail index would be used by s/w ehile enqueuing to determine if
62 	 * there is any space left in the s/w maintained i/p rings
63 	 */
64 	/* Also in case of deq tail will be incremented only in case of
65 	 * in-order job completion
66 	 */
67 	int tail;
68 	/* Read index of the output ring. It may not match with tail in case
69 	 * of out of order completetion
70 	 */
71 	int read_idx;
72 	/* Write index to input ring. Would be always equal to head */
73 	int write_idx;
74 	/* Size of the rings. */
75 	int size;
76 	/* The ip and output rings have to be accessed by SEC. So the
77 	 * pointers will ahve to point to the housekeeping region provided
78 	 * by SEC
79 	 */
80 	/*Circular  Ring of i/p descriptors */
81 	dma_addr_t *input_ring;
82 	/* Circular Ring of o/p descriptors */
83 	/* Circula Ring containing info regarding descriptors in i/p
84 	 * and o/p ring
85 	 */
86 	/* This ring can be on the stack */
87 	struct jr_info info[JR_SIZE];
88 	struct op_ring *output_ring;
89 };
90 
91 struct result {
92 	int done;
93 	uint32_t status;
94 };
95 
96 void caam_jr_strstatus(u32 status);
97 int run_descriptor_jr(uint32_t *desc);
98 
99 #endif
100