xref: /openbmc/u-boot/drivers/crypto/fsl/fsl_hash.c (revision 30754ef7)
1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  *
6  */
7 
8 #include <common.h>
9 #include <malloc.h>
10 #include <memalign.h>
11 #include "jobdesc.h"
12 #include "desc.h"
13 #include "jr.h"
14 #include "fsl_hash.h"
15 #include <hw_sha.h>
16 #include <linux/errno.h>
17 
18 #define CRYPTO_MAX_ALG_NAME	80
19 #define SHA1_DIGEST_SIZE        20
20 #define SHA256_DIGEST_SIZE      32
21 
22 struct caam_hash_template {
23 	char name[CRYPTO_MAX_ALG_NAME];
24 	unsigned int digestsize;
25 	u32 alg_type;
26 };
27 
28 enum caam_hash_algos {
29 	SHA1 = 0,
30 	SHA256
31 };
32 
33 static struct caam_hash_template driver_hash[] = {
34 	{
35 		.name = "sha1",
36 		.digestsize = SHA1_DIGEST_SIZE,
37 		.alg_type = OP_ALG_ALGSEL_SHA1,
38 	},
39 	{
40 		.name = "sha256",
41 		.digestsize = SHA256_DIGEST_SIZE,
42 		.alg_type = OP_ALG_ALGSEL_SHA256,
43 	},
44 };
45 
46 static enum caam_hash_algos get_hash_type(struct hash_algo *algo)
47 {
48 	if (!strcmp(algo->name, driver_hash[SHA1].name))
49 		return SHA1;
50 	else
51 		return SHA256;
52 }
53 
54 /* Create the context for progressive hashing using h/w acceleration.
55  *
56  * @ctxp: Pointer to the pointer of the context for hashing
57  * @caam_algo: Enum for SHA1 or SHA256
58  * @return 0 if ok, -ENOMEM on error
59  */
60 static int caam_hash_init(void **ctxp, enum caam_hash_algos caam_algo)
61 {
62 	*ctxp = calloc(1, sizeof(struct sha_ctx));
63 	if (*ctxp == NULL) {
64 		debug("Cannot allocate memory for context\n");
65 		return -ENOMEM;
66 	}
67 	return 0;
68 }
69 
70 /*
71  * Update sg table for progressive hashing using h/w acceleration
72  *
73  * The context is freed by this function if an error occurs.
74  * We support at most 32 Scatter/Gather Entries.
75  *
76  * @hash_ctx: Pointer to the context for hashing
77  * @buf: Pointer to the buffer being hashed
78  * @size: Size of the buffer being hashed
79  * @is_last: 1 if this is the last update; 0 otherwise
80  * @caam_algo: Enum for SHA1 or SHA256
81  * @return 0 if ok, -EINVAL on error
82  */
83 static int caam_hash_update(void *hash_ctx, const void *buf,
84 			    unsigned int size, int is_last,
85 			    enum caam_hash_algos caam_algo)
86 {
87 	uint32_t final = 0;
88 	phys_addr_t addr = virt_to_phys((void *)buf);
89 	struct sha_ctx *ctx = hash_ctx;
90 
91 	if (ctx->sg_num >= MAX_SG_32) {
92 		free(ctx);
93 		return -EINVAL;
94 	}
95 
96 #ifdef CONFIG_PHYS_64BIT
97 	sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, (uint32_t)(addr >> 32));
98 #else
99 	sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, 0x0);
100 #endif
101 	sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_lo, (uint32_t)addr);
102 
103 	sec_out32(&ctx->sg_tbl[ctx->sg_num].len_flag,
104 		  (size & SG_ENTRY_LENGTH_MASK));
105 
106 	ctx->sg_num++;
107 
108 	if (is_last) {
109 		final = sec_in32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag) |
110 			SG_ENTRY_FINAL_BIT;
111 		sec_out32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag, final);
112 	}
113 
114 	return 0;
115 }
116 
117 /*
118  * Perform progressive hashing on the given buffer and copy hash at
119  * destination buffer
120  *
121  * The context is freed after completion of hash operation.
122  *
123  * @hash_ctx: Pointer to the context for hashing
124  * @dest_buf: Pointer to the destination buffer where hash is to be copied
125  * @size: Size of the buffer being hashed
126  * @caam_algo: Enum for SHA1 or SHA256
127  * @return 0 if ok, -EINVAL on error
128  */
129 static int caam_hash_finish(void *hash_ctx, void *dest_buf,
130 			    int size, enum caam_hash_algos caam_algo)
131 {
132 	uint32_t len = 0;
133 	struct sha_ctx *ctx = hash_ctx;
134 	int i = 0, ret = 0;
135 
136 	if (size < driver_hash[caam_algo].digestsize) {
137 		free(ctx);
138 		return -EINVAL;
139 	}
140 
141 	for (i = 0; i < ctx->sg_num; i++)
142 		len += (sec_in32(&ctx->sg_tbl[i].len_flag) &
143 			SG_ENTRY_LENGTH_MASK);
144 
145 	inline_cnstr_jobdesc_hash(ctx->sha_desc, (uint8_t *)ctx->sg_tbl, len,
146 				  ctx->hash,
147 				  driver_hash[caam_algo].alg_type,
148 				  driver_hash[caam_algo].digestsize,
149 				  1);
150 
151 	ret = run_descriptor_jr(ctx->sha_desc);
152 
153 	if (ret)
154 		debug("Error %x\n", ret);
155 	else
156 		memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
157 
158 	free(ctx);
159 	return ret;
160 }
161 
162 int caam_hash(const unsigned char *pbuf, unsigned int buf_len,
163 	      unsigned char *pout, enum caam_hash_algos algo)
164 {
165 	int ret = 0;
166 	uint32_t *desc;
167 	unsigned int size;
168 
169 	desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE);
170 	if (!desc) {
171 		debug("Not enough memory for descriptor allocation\n");
172 		return -ENOMEM;
173 	}
174 
175 	if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) ||
176 	    !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) {
177 		puts("Error: Address arguments are not aligned\n");
178 		return -EINVAL;
179 	}
180 
181 	size = ALIGN(buf_len, ARCH_DMA_MINALIGN);
182 	flush_dcache_range((unsigned long)pbuf, (unsigned long)pbuf + size);
183 
184 	inline_cnstr_jobdesc_hash(desc, pbuf, buf_len, pout,
185 				  driver_hash[algo].alg_type,
186 				  driver_hash[algo].digestsize,
187 				  0);
188 
189 	size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN);
190 	flush_dcache_range((unsigned long)desc, (unsigned long)desc + size);
191 
192 	ret = run_descriptor_jr(desc);
193 
194 	size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN);
195 	invalidate_dcache_range((unsigned long)pout,
196 				(unsigned long)pout + size);
197 
198 	free(desc);
199 	return ret;
200 }
201 
202 void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,
203 			unsigned char *pout, unsigned int chunk_size)
204 {
205 	if (caam_hash(pbuf, buf_len, pout, SHA256))
206 		printf("CAAM was not setup properly or it is faulty\n");
207 }
208 
209 void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
210 			unsigned char *pout, unsigned int chunk_size)
211 {
212 	if (caam_hash(pbuf, buf_len, pout, SHA1))
213 		printf("CAAM was not setup properly or it is faulty\n");
214 }
215 
216 int hw_sha_init(struct hash_algo *algo, void **ctxp)
217 {
218 	return caam_hash_init(ctxp, get_hash_type(algo));
219 }
220 
221 int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,
222 			    unsigned int size, int is_last)
223 {
224 	return caam_hash_update(ctx, buf, size, is_last, get_hash_type(algo));
225 }
226 
227 int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf,
228 		     int size)
229 {
230 	return caam_hash_finish(ctx, dest_buf, size, get_hash_type(algo));
231 }
232