1 /* 2 * Header file for Advanced Crypto Engine - SFR definitions 3 * 4 * Copyright (c) 2012 Samsung Electronics 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 #ifndef __ACE_SHA_H 23 #define __ACE_SHA_H 24 25 struct exynos_ace_sfr { 26 unsigned int fc_intstat; /* base + 0 */ 27 unsigned int fc_intenset; 28 unsigned int fc_intenclr; 29 unsigned int fc_intpend; 30 unsigned int fc_fifostat; 31 unsigned int fc_fifoctrl; 32 unsigned int fc_global; 33 unsigned int res1; 34 unsigned int fc_brdmas; 35 unsigned int fc_brdmal; 36 unsigned int fc_brdmac; 37 unsigned int res2; 38 unsigned int fc_btdmas; 39 unsigned int fc_btdmal; 40 unsigned int fc_btdmac; 41 unsigned int res3; 42 unsigned int fc_hrdmas; 43 unsigned int fc_hrdmal; 44 unsigned int fc_hrdmac; 45 unsigned int res4; 46 unsigned int fc_pkdmas; 47 unsigned int fc_pkdmal; 48 unsigned int fc_pkdmac; 49 unsigned int fc_pkdmao; 50 unsigned char res5[0x1a0]; 51 52 unsigned int aes_control; /* base + 0x200 */ 53 unsigned int aes_status; 54 unsigned char res6[0x8]; 55 unsigned int aes_in[4]; 56 unsigned int aes_out[4]; 57 unsigned int aes_iv[4]; 58 unsigned int aes_cnt[4]; 59 unsigned char res7[0x30]; 60 unsigned int aes_key[8]; 61 unsigned char res8[0x60]; 62 63 unsigned int tdes_control; /* base + 0x300 */ 64 unsigned int tdes_status; 65 unsigned char res9[0x8]; 66 unsigned int tdes_key[6]; 67 unsigned int tdes_iv[2]; 68 unsigned int tdes_in[2]; 69 unsigned int tdes_out[2]; 70 unsigned char res10[0xc0]; 71 72 unsigned int hash_control; /* base + 0x400 */ 73 unsigned int hash_control2; 74 unsigned int hash_fifo_mode; 75 unsigned int hash_byteswap; 76 unsigned int hash_status; 77 unsigned char res11[0xc]; 78 unsigned int hash_msgsize_low; 79 unsigned int hash_msgsize_high; 80 unsigned int hash_prelen_low; 81 unsigned int hash_prelen_high; 82 unsigned int hash_in[16]; 83 unsigned int hash_key_in[16]; 84 unsigned int hash_iv[8]; 85 unsigned char res12[0x30]; 86 unsigned int hash_result[8]; 87 unsigned char res13[0x20]; 88 unsigned int hash_seed[8]; 89 unsigned int hash_prng[8]; 90 unsigned char res14[0x180]; 91 92 unsigned int pka_sfr[5]; /* base + 0x700 */ 93 }; 94 95 /* ACE_FC_INT */ 96 #define ACE_FC_PKDMA (1 << 0) 97 #define ACE_FC_HRDMA (1 << 1) 98 #define ACE_FC_BTDMA (1 << 2) 99 #define ACE_FC_BRDMA (1 << 3) 100 #define ACE_FC_PRNG_ERROR (1 << 4) 101 #define ACE_FC_MSG_DONE (1 << 5) 102 #define ACE_FC_PRNG_DONE (1 << 6) 103 #define ACE_FC_PARTIAL_DONE (1 << 7) 104 105 /* ACE_FC_FIFOSTAT */ 106 #define ACE_FC_PKFIFO_EMPTY (1 << 0) 107 #define ACE_FC_PKFIFO_FULL (1 << 1) 108 #define ACE_FC_HRFIFO_EMPTY (1 << 2) 109 #define ACE_FC_HRFIFO_FULL (1 << 3) 110 #define ACE_FC_BTFIFO_EMPTY (1 << 4) 111 #define ACE_FC_BTFIFO_FULL (1 << 5) 112 #define ACE_FC_BRFIFO_EMPTY (1 << 6) 113 #define ACE_FC_BRFIFO_FULL (1 << 7) 114 115 /* ACE_FC_FIFOCTRL */ 116 #define ACE_FC_SELHASH_MASK (3 << 0) 117 #define ACE_FC_SELHASH_EXOUT (0 << 0) /* independent source */ 118 #define ACE_FC_SELHASH_BCIN (1 << 0) /* blk cipher input */ 119 #define ACE_FC_SELHASH_BCOUT (2 << 0) /* blk cipher output */ 120 #define ACE_FC_SELBC_MASK (1 << 2) 121 #define ACE_FC_SELBC_AES (0 << 2) 122 #define ACE_FC_SELBC_DES (1 << 2) 123 124 /* ACE_FC_GLOBAL */ 125 #define ACE_FC_SSS_RESET (1 << 0) 126 #define ACE_FC_DMA_RESET (1 << 1) 127 #define ACE_FC_AES_RESET (1 << 2) 128 #define ACE_FC_DES_RESET (1 << 3) 129 #define ACE_FC_HASH_RESET (1 << 4) 130 #define ACE_FC_AXI_ENDIAN_MASK (3 << 6) 131 #define ACE_FC_AXI_ENDIAN_LE (0 << 6) 132 #define ACE_FC_AXI_ENDIAN_BIBE (1 << 6) 133 #define ACE_FC_AXI_ENDIAN_WIBE (2 << 6) 134 135 /* Feed control - BRDMA control */ 136 #define ACE_FC_BRDMACFLUSH_OFF (0 << 0) 137 #define ACE_FC_BRDMACFLUSH_ON (1 << 0) 138 #define ACE_FC_BRDMACSWAP_ON (1 << 1) 139 #define ACE_FC_BRDMACARPROT_MASK (0x7 << 2) 140 #define ACE_FC_BRDMACARPROT_OFS 2 141 #define ACE_FC_BRDMACARCACHE_MASK (0xf << 5) 142 #define ACE_FC_BRDMACARCACHE_OFS 5 143 144 /* Feed control - BTDMA control */ 145 #define ACE_FC_BTDMACFLUSH_OFF (0 << 0) 146 #define ACE_FC_BTDMACFLUSH_ON (1 << 0) 147 #define ACE_FC_BTDMACSWAP_ON (1 << 1) 148 #define ACE_FC_BTDMACAWPROT_MASK (0x7 << 2) 149 #define ACE_FC_BTDMACAWPROT_OFS 2 150 #define ACE_FC_BTDMACAWCACHE_MASK (0xf << 5) 151 #define ACE_FC_BTDMACAWCACHE_OFS 5 152 153 /* Feed control - HRDMA control */ 154 #define ACE_FC_HRDMACFLUSH_OFF (0 << 0) 155 #define ACE_FC_HRDMACFLUSH_ON (1 << 0) 156 #define ACE_FC_HRDMACSWAP_ON (1 << 1) 157 #define ACE_FC_HRDMACARPROT_MASK (0x7 << 2) 158 #define ACE_FC_HRDMACARPROT_OFS 2 159 #define ACE_FC_HRDMACARCACHE_MASK (0xf << 5) 160 #define ACE_FC_HRDMACARCACHE_OFS 5 161 162 /* Feed control - PKDMA control */ 163 #define ACE_FC_PKDMACBYTESWAP_ON (1 << 3) 164 #define ACE_FC_PKDMACDESEND_ON (1 << 2) 165 #define ACE_FC_PKDMACTRANSMIT_ON (1 << 1) 166 #define ACE_FC_PKDMACFLUSH_ON (1 << 0) 167 168 /* Feed control - PKDMA offset */ 169 #define ACE_FC_SRAMOFFSET_MASK 0xfff 170 171 /* AES control */ 172 #define ACE_AES_MODE_MASK (1 << 0) 173 #define ACE_AES_MODE_ENC (0 << 0) 174 #define ACE_AES_MODE_DEC (1 << 0) 175 #define ACE_AES_OPERMODE_MASK (3 << 1) 176 #define ACE_AES_OPERMODE_ECB (0 << 1) 177 #define ACE_AES_OPERMODE_CBC (1 << 1) 178 #define ACE_AES_OPERMODE_CTR (2 << 1) 179 #define ACE_AES_FIFO_MASK (1 << 3) 180 #define ACE_AES_FIFO_OFF (0 << 3) /* CPU mode */ 181 #define ACE_AES_FIFO_ON (1 << 3) /* FIFO mode */ 182 #define ACE_AES_KEYSIZE_MASK (3 << 4) 183 #define ACE_AES_KEYSIZE_128 (0 << 4) 184 #define ACE_AES_KEYSIZE_192 (1 << 4) 185 #define ACE_AES_KEYSIZE_256 (2 << 4) 186 #define ACE_AES_KEYCNGMODE_MASK (1 << 6) 187 #define ACE_AES_KEYCNGMODE_OFF (0 << 6) 188 #define ACE_AES_KEYCNGMODE_ON (1 << 6) 189 #define ACE_AES_SWAP_MASK (0x1f << 7) 190 #define ACE_AES_SWAPKEY_OFF (0 << 7) 191 #define ACE_AES_SWAPKEY_ON (1 << 7) 192 #define ACE_AES_SWAPCNT_OFF (0 << 8) 193 #define ACE_AES_SWAPCNT_ON (1 << 8) 194 #define ACE_AES_SWAPIV_OFF (0 << 9) 195 #define ACE_AES_SWAPIV_ON (1 << 9) 196 #define ACE_AES_SWAPDO_OFF (0 << 10) 197 #define ACE_AES_SWAPDO_ON (1 << 10) 198 #define ACE_AES_SWAPDI_OFF (0 << 11) 199 #define ACE_AES_SWAPDI_ON (1 << 11) 200 #define ACE_AES_COUNTERSIZE_MASK (3 << 12) 201 #define ACE_AES_COUNTERSIZE_128 (0 << 12) 202 #define ACE_AES_COUNTERSIZE_64 (1 << 12) 203 #define ACE_AES_COUNTERSIZE_32 (2 << 12) 204 #define ACE_AES_COUNTERSIZE_16 (3 << 12) 205 206 /* AES status */ 207 #define ACE_AES_OUTRDY_MASK (1 << 0) 208 #define ACE_AES_OUTRDY_OFF (0 << 0) 209 #define ACE_AES_OUTRDY_ON (1 << 0) 210 #define ACE_AES_INRDY_MASK (1 << 1) 211 #define ACE_AES_INRDY_OFF (0 << 1) 212 #define ACE_AES_INRDY_ON (1 << 1) 213 #define ACE_AES_BUSY_MASK (1 << 2) 214 #define ACE_AES_BUSY_OFF (0 << 2) 215 #define ACE_AES_BUSY_ON (1 << 2) 216 217 /* TDES control */ 218 #define ACE_TDES_MODE_MASK (1 << 0) 219 #define ACE_TDES_MODE_ENC (0 << 0) 220 #define ACE_TDES_MODE_DEC (1 << 0) 221 #define ACE_TDES_OPERMODE_MASK (1 << 1) 222 #define ACE_TDES_OPERMODE_ECB (0 << 1) 223 #define ACE_TDES_OPERMODE_CBC (1 << 1) 224 #define ACE_TDES_SEL_MASK (3 << 3) 225 #define ACE_TDES_SEL_DES (0 << 3) 226 #define ACE_TDES_SEL_TDESEDE (1 << 3) /* TDES EDE mode */ 227 #define ACE_TDES_SEL_TDESEEE (3 << 3) /* TDES EEE mode */ 228 #define ACE_TDES_FIFO_MASK (1 << 5) 229 #define ACE_TDES_FIFO_OFF (0 << 5) /* CPU mode */ 230 #define ACE_TDES_FIFO_ON (1 << 5) /* FIFO mode */ 231 #define ACE_TDES_SWAP_MASK (0xf << 6) 232 #define ACE_TDES_SWAPKEY_OFF (0 << 6) 233 #define ACE_TDES_SWAPKEY_ON (1 << 6) 234 #define ACE_TDES_SWAPIV_OFF (0 << 7) 235 #define ACE_TDES_SWAPIV_ON (1 << 7) 236 #define ACE_TDES_SWAPDO_OFF (0 << 8) 237 #define ACE_TDES_SWAPDO_ON (1 << 8) 238 #define ACE_TDES_SWAPDI_OFF (0 << 9) 239 #define ACE_TDES_SWAPDI_ON (1 << 9) 240 241 /* TDES status */ 242 #define ACE_TDES_OUTRDY_MASK (1 << 0) 243 #define ACE_TDES_OUTRDY_OFF (0 << 0) 244 #define ACE_TDES_OUTRDY_ON (1 << 0) 245 #define ACE_TDES_INRDY_MASK (1 << 1) 246 #define ACE_TDES_INRDY_OFF (0 << 1) 247 #define ACE_TDES_INRDY_ON (1 << 1) 248 #define ACE_TDES_BUSY_MASK (1 << 2) 249 #define ACE_TDES_BUSY_OFF (0 << 2) 250 #define ACE_TDES_BUSY_ON (1 << 2) 251 252 /* Hash control */ 253 #define ACE_HASH_ENGSEL_MASK (0xf << 0) 254 #define ACE_HASH_ENGSEL_SHA1HASH (0x0 << 0) 255 #define ACE_HASH_ENGSEL_SHA1HMAC (0x1 << 0) 256 #define ACE_HASH_ENGSEL_SHA1HMACIN (0x1 << 0) 257 #define ACE_HASH_ENGSEL_SHA1HMACOUT (0x9 << 0) 258 #define ACE_HASH_ENGSEL_MD5HASH (0x2 << 0) 259 #define ACE_HASH_ENGSEL_MD5HMAC (0x3 << 0) 260 #define ACE_HASH_ENGSEL_MD5HMACIN (0x3 << 0) 261 #define ACE_HASH_ENGSEL_MD5HMACOUT (0xb << 0) 262 #define ACE_HASH_ENGSEL_SHA256HASH (0x4 << 0) 263 #define ACE_HASH_ENGSEL_SHA256HMAC (0x5 << 0) 264 #define ACE_HASH_ENGSEL_PRNG (0x8 << 0) 265 #define ACE_HASH_STARTBIT_ON (1 << 4) 266 #define ACE_HASH_USERIV_EN (1 << 5) 267 #define ACE_HASH_PAUSE_ON (1 << 0) 268 269 /* Hash control - FIFO mode */ 270 #define ACE_HASH_FIFO_MASK (1 << 0) 271 #define ACE_HASH_FIFO_OFF (0 << 0) 272 #define ACE_HASH_FIFO_ON (1 << 0) 273 274 /* Hash control - byte swap */ 275 #define ACE_HASH_SWAP_MASK (0xf << 0) 276 #define ACE_HASH_SWAPKEY_OFF (0 << 0) 277 #define ACE_HASH_SWAPKEY_ON (1 << 0) 278 #define ACE_HASH_SWAPIV_OFF (0 << 1) 279 #define ACE_HASH_SWAPIV_ON (1 << 1) 280 #define ACE_HASH_SWAPDO_OFF (0 << 2) 281 #define ACE_HASH_SWAPDO_ON (1 << 2) 282 #define ACE_HASH_SWAPDI_OFF (0 << 3) 283 #define ACE_HASH_SWAPDI_ON (1 << 3) 284 285 /* Hash status */ 286 #define ACE_HASH_BUFRDY_MASK (1 << 0) 287 #define ACE_HASH_BUFRDY_OFF (0 << 0) 288 #define ACE_HASH_BUFRDY_ON (1 << 0) 289 #define ACE_HASH_SEEDSETTING_MASK (1 << 1) 290 #define ACE_HASH_SEEDSETTING_OFF (0 << 1) 291 #define ACE_HASH_SEEDSETTING_ON (1 << 1) 292 #define ACE_HASH_PRNGBUSY_MASK (1 << 2) 293 #define ACE_HASH_PRNGBUSY_OFF (0 << 2) 294 #define ACE_HASH_PRNGBUSY_ON (1 << 2) 295 #define ACE_HASH_PARTIALDONE_MASK (1 << 4) 296 #define ACE_HASH_PARTIALDONE_OFF (0 << 4) 297 #define ACE_HASH_PARTIALDONE_ON (1 << 4) 298 #define ACE_HASH_PRNGDONE_MASK (1 << 5) 299 #define ACE_HASH_PRNGDONE_OFF (0 << 5) 300 #define ACE_HASH_PRNGDONE_ON (1 << 5) 301 #define ACE_HASH_MSGDONE_MASK (1 << 6) 302 #define ACE_HASH_MSGDONE_OFF (0 << 6) 303 #define ACE_HASH_MSGDONE_ON (1 << 6) 304 #define ACE_HASH_PRNGERROR_MASK (1 << 7) 305 #define ACE_HASH_PRNGERROR_OFF (0 << 7) 306 #define ACE_HASH_PRNGERROR_ON (1 << 7) 307 308 #define ACE_SHA_TYPE_SHA1 1 309 #define ACE_SHA_TYPE_SHA256 2 310 311 /** 312 * Computes hash value of input pbuf using ACE 313 * 314 * @param in_addr A pointer to the input buffer 315 * @param bufleni Byte length of input buffer 316 * @param out_addr A pointer to the output buffer. When complete 317 * 32 bytes are copied to pout[0]...pout[31]. Thus, a user 318 * should allocate at least 32 bytes at pOut in advance. 319 * @param hash_type SHA1 or SHA256 320 * 321 * @return 0 on Success, -1 on Failure (Timeout) 322 */ 323 int ace_sha_hash_digest(const uchar * in_addr, uint buflen, 324 uchar * out_addr, uint hash_type); 325 #endif 326