1 /* 2 * Advanced Crypto Engine - SHA Firmware 3 * Copyright (c) 2012 Samsung Electronics 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 #include <common.h> 8 #include <sha256.h> 9 #include <sha1.h> 10 #include <asm/errno.h> 11 #include "ace_sha.h" 12 13 /* SHA1 value for the message of zero length */ 14 static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = { 15 0xDA, 0x39, 0xA3, 0xEE, 0x5E, 0x6B, 0x4B, 0x0D, 16 0x32, 0x55, 0xBF, 0xFF, 0x95, 0x60, 0x18, 0x90, 17 0xAF, 0xD8, 0x07, 0x09}; 18 19 /* SHA256 value for the message of zero length */ 20 static const unsigned char sha256_digest_emptymsg[SHA256_SUM_LEN] = { 21 0xE3, 0xB0, 0xC4, 0x42, 0x98, 0xFC, 0x1C, 0x14, 22 0x9A, 0xFB, 0xF4, 0xC8, 0x99, 0x6F, 0xB9, 0x24, 23 0x27, 0xAE, 0x41, 0xE4, 0x64, 0x9B, 0x93, 0x4C, 24 0xA4, 0x95, 0x99, 0x1B, 0x78, 0x52, 0xB8, 0x55}; 25 26 int ace_sha_hash_digest(const unsigned char *pbuf, unsigned int buf_len, 27 unsigned char *pout, unsigned int hash_type) 28 { 29 unsigned int i, reg, len; 30 unsigned int *pdigest; 31 struct exynos_ace_sfr *ace_sha_reg = 32 (struct exynos_ace_sfr *)samsung_get_base_ace_sfr(); 33 34 if (buf_len == 0) { 35 /* ACE H/W cannot compute hash value for empty string */ 36 if (hash_type == ACE_SHA_TYPE_SHA1) 37 memcpy(pout, sha1_digest_emptymsg, SHA1_SUM_LEN); 38 else 39 memcpy(pout, sha256_digest_emptymsg, SHA256_SUM_LEN); 40 return 0; 41 } 42 43 /* Flush HRDMA */ 44 writel(ACE_FC_HRDMACFLUSH_ON, &ace_sha_reg->fc_hrdmac); 45 writel(ACE_FC_HRDMACFLUSH_OFF, &ace_sha_reg->fc_hrdmac); 46 47 /* Set byte swap of data in */ 48 writel(ACE_HASH_SWAPDI_ON | ACE_HASH_SWAPDO_ON | ACE_HASH_SWAPIV_ON, 49 &ace_sha_reg->hash_byteswap); 50 51 /* Select Hash input mux as external source */ 52 reg = readl(&ace_sha_reg->fc_fifoctrl); 53 reg = (reg & ~ACE_FC_SELHASH_MASK) | ACE_FC_SELHASH_EXOUT; 54 writel(reg, &ace_sha_reg->fc_fifoctrl); 55 56 /* Set Hash as SHA1 or SHA256 and start Hash engine */ 57 reg = (hash_type == ACE_SHA_TYPE_SHA1) ? 58 ACE_HASH_ENGSEL_SHA1HASH : ACE_HASH_ENGSEL_SHA256HASH; 59 reg |= ACE_HASH_STARTBIT_ON; 60 writel(reg, &ace_sha_reg->hash_control); 61 62 /* Enable FIFO mode */ 63 writel(ACE_HASH_FIFO_ON, &ace_sha_reg->hash_fifo_mode); 64 65 /* Set message length */ 66 writel(buf_len, &ace_sha_reg->hash_msgsize_low); 67 writel(0, &ace_sha_reg->hash_msgsize_high); 68 69 /* Set HRDMA */ 70 writel((unsigned int)pbuf, &ace_sha_reg->fc_hrdmas); 71 writel(buf_len, &ace_sha_reg->fc_hrdmal); 72 73 while ((readl(&ace_sha_reg->hash_status) & ACE_HASH_MSGDONE_MASK) == 74 ACE_HASH_MSGDONE_OFF) { 75 /* 76 * PRNG error bit goes HIGH if a PRNG request occurs without 77 * a complete seed setup. We are using this bit to check h/w 78 * fault because proper setup is not expected in that case. 79 */ 80 if ((readl(&ace_sha_reg->hash_status) 81 & ACE_HASH_PRNGERROR_MASK) == ACE_HASH_PRNGERROR_ON) 82 return -EBUSY; 83 } 84 85 /* Clear MSG_DONE bit */ 86 writel(ACE_HASH_MSGDONE_ON, &ace_sha_reg->hash_status); 87 88 /* Read hash result */ 89 pdigest = (unsigned int *)pout; 90 len = (hash_type == ACE_SHA_TYPE_SHA1) ? SHA1_SUM_LEN : SHA256_SUM_LEN; 91 92 for (i = 0; i < len / 4; i++) 93 pdigest[i] = readl(&ace_sha_reg->hash_result[i]); 94 95 /* Clear HRDMA pending bit */ 96 writel(ACE_FC_HRDMA, &ace_sha_reg->fc_intpend); 97 98 return 0; 99 } 100 101 void hw_sha256(const unsigned char *pbuf, unsigned int buf_len, 102 unsigned char *pout, unsigned int chunk_size) 103 { 104 if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA256)) 105 debug("ACE was not setup properly or it is faulty\n"); 106 } 107 108 void hw_sha1(const unsigned char *pbuf, unsigned int buf_len, 109 unsigned char *pout, unsigned int chunk_size) 110 { 111 if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1)) 112 debug("ACE was not setup properly or it is faulty\n"); 113 } 114