1 /*
2  * Copyright (C) 2016 Socionext Inc.
3  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __CLK_UNIPHIER_H__
9 #define __CLK_UNIPHIER_H__
10 
11 #include <linux/kernel.h>
12 
13 struct uniphier_clk_gate_data {
14 	int index;
15 	unsigned int reg;
16 	u32 mask;
17 	u32 data;
18 };
19 
20 struct uniphier_clk_rate_data {
21 	int index;
22 	unsigned int reg;
23 #define UNIPHIER_CLK_RATE_IS_FIXED		UINT_MAX
24 	u32 mask;
25 	u32 data;
26 	unsigned long rate;
27 };
28 
29 struct uniphier_clk_soc_data {
30 	struct uniphier_clk_gate_data *gate;
31 	unsigned int nr_gate;
32 	struct uniphier_clk_rate_data *rate;
33 	unsigned int nr_rate;
34 };
35 
36 #define UNIPHIER_CLK_FIXED_RATE(i, f)			\
37 	{						\
38 		.index = i,				\
39 		.reg = UNIPHIER_CLK_RATE_IS_FIXED,	\
40 		.rate = f,				\
41 	}
42 
43 /**
44  * struct uniphier_clk_priv - private data for UniPhier clock driver
45  *
46  * @base: base address of the clock provider
47  * @socdata: SoC specific data
48  */
49 struct uniphier_clk_priv {
50 	void __iomem *base;
51 	struct uniphier_clk_soc_data *socdata;
52 };
53 
54 extern const struct clk_ops uniphier_clk_ops;
55 int uniphier_clk_probe(struct udevice *dev);
56 
57 #endif /* __CLK_UNIPHIER_H__ */
58