1 /* 2 * Copyright (C) 2016-2017 Socionext Inc. 3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include "clk-uniphier.h" 9 10 /* Denali driver requires clk_x rate (clk: 50MHz, clk_x & ecc_clk: 200MHz) */ 11 #define UNIPHIER_LD4_SYS_CLK_NAND(_id) \ 12 UNIPHIER_CLK_RATE(128, 200000000), \ 13 UNIPHIER_CLK_GATE((_id), 128, 0x2104, 2) 14 15 #define UNIPHIER_LD11_SYS_CLK_NAND(_id) \ 16 UNIPHIER_CLK_RATE(128, 200000000), \ 17 UNIPHIER_CLK_GATE((_id), 128, 0x210c, 0) 18 19 const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { 20 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_SLD8) ||\ 21 defined(CONFIG_ARCH_UNIPHIER_PRO4) || defined(CONFIG_ARCH_UNIPHIER_PRO5) ||\ 22 defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) 23 UNIPHIER_LD4_SYS_CLK_NAND(2), 24 UNIPHIER_CLK_GATE_SIMPLE(8, 0x2104, 10), /* stdmac */ 25 UNIPHIER_CLK_GATE_SIMPLE(12, 0x2104, 6), /* gio (Pro4, Pro5) */ 26 UNIPHIER_CLK_GATE_SIMPLE(14, 0x2104, 16), /* usb30 (Pro4, Pro5, PXs2) */ 27 UNIPHIER_CLK_GATE_SIMPLE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */ 28 UNIPHIER_CLK_GATE_SIMPLE(16, 0x2104, 19), /* usb30-phy (PXs2) */ 29 UNIPHIER_CLK_GATE_SIMPLE(20, 0x2104, 20), /* usb31-phy (PXs2) */ 30 { /* sentinel */ } 31 #endif 32 }; 33 34 const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { 35 #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) 36 UNIPHIER_LD11_SYS_CLK_NAND(2), 37 UNIPHIER_CLK_GATE_SIMPLE(8, 0x210c, 8), /* stdmac */ 38 UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 14), /* usb30 (LD20) */ 39 UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ 40 UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 13), /* usb30-phy1 (LD20) */ 41 { /* sentinel */ } 42 #endif 43 }; 44 45 const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { 46 #if defined(CONFIG_ARCH_UNIPHIER_PXS3) 47 UNIPHIER_LD11_SYS_CLK_NAND(2), 48 UNIPHIER_CLK_GATE_SIMPLE(12, 0x210c, 4), /* usb30 (gio0) */ 49 UNIPHIER_CLK_GATE_SIMPLE(13, 0x210c, 5), /* usb31-0 (gio1) */ 50 UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 6), /* usb31-1 (gio1-1) */ 51 UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 16), /* usb30-phy0 */ 52 UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 18), /* usb30-phy1 */ 53 UNIPHIER_CLK_GATE_SIMPLE(18, 0x210c, 20), /* usb30-phy2 */ 54 UNIPHIER_CLK_GATE_SIMPLE(20, 0x210c, 17), /* usb31-phy0 */ 55 UNIPHIER_CLK_GATE_SIMPLE(21, 0x210c, 19), /* usb31-phy1 */ 56 { /* sentinel */ } 57 #endif 58 }; 59