1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0
2d9fd7008SStephen Warren /*
3d9fd7008SStephen Warren * Copyright (c) 2016, NVIDIA CORPORATION.
4d9fd7008SStephen Warren */
5d9fd7008SStephen Warren
6d9fd7008SStephen Warren #include <common.h>
7d9fd7008SStephen Warren #include <clk-uclass.h>
8d9fd7008SStephen Warren #include <dm.h>
9d9fd7008SStephen Warren #include <misc.h>
10d9fd7008SStephen Warren #include <asm/arch-tegra/bpmp_abi.h>
11d9fd7008SStephen Warren
tegra186_clk_get_rate(struct clk * clk)12d9fd7008SStephen Warren static ulong tegra186_clk_get_rate(struct clk *clk)
13d9fd7008SStephen Warren {
14d9fd7008SStephen Warren struct mrq_clk_request req;
15d9fd7008SStephen Warren struct mrq_clk_response resp;
16d9fd7008SStephen Warren int ret;
17d9fd7008SStephen Warren
18d9fd7008SStephen Warren debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
19d9fd7008SStephen Warren clk->id);
20d9fd7008SStephen Warren
21d9fd7008SStephen Warren req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id;
22d9fd7008SStephen Warren
23d9fd7008SStephen Warren ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
24d9fd7008SStephen Warren sizeof(resp));
25d9fd7008SStephen Warren if (ret < 0)
26d9fd7008SStephen Warren return ret;
27d9fd7008SStephen Warren
28d9fd7008SStephen Warren return resp.clk_get_rate.rate;
29d9fd7008SStephen Warren }
30d9fd7008SStephen Warren
tegra186_clk_set_rate(struct clk * clk,ulong rate)31d9fd7008SStephen Warren static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)
32d9fd7008SStephen Warren {
33d9fd7008SStephen Warren struct mrq_clk_request req;
34d9fd7008SStephen Warren struct mrq_clk_response resp;
35d9fd7008SStephen Warren int ret;
36d9fd7008SStephen Warren
37d9fd7008SStephen Warren debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate,
38d9fd7008SStephen Warren clk->dev, clk->id);
39d9fd7008SStephen Warren
40d9fd7008SStephen Warren req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id;
41d9fd7008SStephen Warren req.clk_set_rate.rate = rate;
42d9fd7008SStephen Warren
43d9fd7008SStephen Warren ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
44d9fd7008SStephen Warren sizeof(resp));
45d9fd7008SStephen Warren if (ret < 0)
46d9fd7008SStephen Warren return ret;
47d9fd7008SStephen Warren
48d9fd7008SStephen Warren return resp.clk_set_rate.rate;
49d9fd7008SStephen Warren }
50d9fd7008SStephen Warren
tegra186_clk_en_dis(struct clk * clk,enum mrq_reset_commands cmd)51d9fd7008SStephen Warren static int tegra186_clk_en_dis(struct clk *clk,
52d9fd7008SStephen Warren enum mrq_reset_commands cmd)
53d9fd7008SStephen Warren {
54d9fd7008SStephen Warren struct mrq_clk_request req;
55d9fd7008SStephen Warren struct mrq_clk_response resp;
56d9fd7008SStephen Warren int ret;
57d9fd7008SStephen Warren
58d9fd7008SStephen Warren req.cmd_and_id = (cmd << 24) | clk->id;
59d9fd7008SStephen Warren
60d9fd7008SStephen Warren ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
61d9fd7008SStephen Warren sizeof(resp));
62d9fd7008SStephen Warren if (ret < 0)
63d9fd7008SStephen Warren return ret;
64d9fd7008SStephen Warren
65d9fd7008SStephen Warren return 0;
66d9fd7008SStephen Warren }
67d9fd7008SStephen Warren
tegra186_clk_enable(struct clk * clk)68d9fd7008SStephen Warren static int tegra186_clk_enable(struct clk *clk)
69d9fd7008SStephen Warren {
70d9fd7008SStephen Warren debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
71d9fd7008SStephen Warren clk->id);
72d9fd7008SStephen Warren
73d9fd7008SStephen Warren return tegra186_clk_en_dis(clk, CMD_CLK_ENABLE);
74d9fd7008SStephen Warren }
75d9fd7008SStephen Warren
tegra186_clk_disable(struct clk * clk)76d9fd7008SStephen Warren static int tegra186_clk_disable(struct clk *clk)
77d9fd7008SStephen Warren {
78d9fd7008SStephen Warren debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
79d9fd7008SStephen Warren clk->id);
80d9fd7008SStephen Warren
81d9fd7008SStephen Warren return tegra186_clk_en_dis(clk, CMD_CLK_DISABLE);
82d9fd7008SStephen Warren }
83d9fd7008SStephen Warren
84d9fd7008SStephen Warren static struct clk_ops tegra186_clk_ops = {
85d9fd7008SStephen Warren .get_rate = tegra186_clk_get_rate,
86d9fd7008SStephen Warren .set_rate = tegra186_clk_set_rate,
87d9fd7008SStephen Warren .enable = tegra186_clk_enable,
88d9fd7008SStephen Warren .disable = tegra186_clk_disable,
89d9fd7008SStephen Warren };
90d9fd7008SStephen Warren
tegra186_clk_probe(struct udevice * dev)91d9fd7008SStephen Warren static int tegra186_clk_probe(struct udevice *dev)
92d9fd7008SStephen Warren {
93d9fd7008SStephen Warren debug("%s(dev=%p)\n", __func__, dev);
94d9fd7008SStephen Warren
95d9fd7008SStephen Warren return 0;
96d9fd7008SStephen Warren }
97d9fd7008SStephen Warren
98d9fd7008SStephen Warren U_BOOT_DRIVER(tegra186_clk) = {
99d9fd7008SStephen Warren .name = "tegra186_clk",
100d9fd7008SStephen Warren .id = UCLASS_CLK,
101d9fd7008SStephen Warren .probe = tegra186_clk_probe,
102d9fd7008SStephen Warren .ops = &tegra186_clk_ops,
103d9fd7008SStephen Warren };
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